Searched refs:tmp1 (Results 1 – 3 of 3) sorted by relevance
/art/runtime/arch/arm64/ |
D | memcmp16_arm64.S | 41 #define tmp1 x8 macro 53 eor tmp1, src1, src2 54 tst tmp1, #7 56 ands tmp1, src1, #7 111 add limit, limit, tmp1 /* Adjust the limit for the extra. */ 112 lsl tmp1, tmp1, #3 /* Bytes beyond alignment -> bits. */ 114 neg tmp1, tmp1 /* Bits to alignment -64. */ 118 lsr tmp2, tmp2, tmp1 /* Shift (tmp1 & 63). */
|
/art/compiler/dex/quick/arm/ |
D | fp_arm.cc | 177 RegStorage tmp1 = AllocTempDouble(); in GenConversion() local 180 NewLIR2(kThumb2VcvtF64S32, tmp1.GetReg(), src_high.GetReg()); in GenConversion() 183 NewLIR3(kThumb2VmlaF64, rl_result.reg.GetReg(), tmp1.GetReg(), tmp2.GetReg()); in GenConversion() 184 FreeTemp(tmp1); in GenConversion()
|
D | int_arm.cc | 565 RegStorage tmp1 = r_lo; in SmallLiteralDivRem() local 571 GenEasyMultiplyTwoOps(tmp1, r_div_result, ops); in SmallLiteralDivRem() 572 OpRegRegReg(kOpSub, rl_result.reg, rl_src.reg, tmp1); in SmallLiteralDivRem() 1303 RegStorage tmp1 = rs_rARM_LR; in GenMulLong() local 1309 NewLIR3(kThumb2MulRRR, tmp1.GetReg(), rl_src1.reg.GetLowReg(), rl_src1.reg.GetHighReg()); in GenMulLong() 1312 OpRegRegRegShift(kOpAdd, res_hi, res_hi, tmp1, EncodeShift(kArmLsl, 1)); in GenMulLong() 1314 NewLIR3(kThumb2MulRRR, tmp1.GetReg(), rl_src2.reg.GetLowReg(), rl_src1.reg.GetHighReg()); in GenMulLong() 1328 NewLIR4(kThumb2Mla, tmp1.GetReg(), rl_src1.reg.GetLowReg(), rl_src2.reg.GetHighReg(), in GenMulLong() 1329 tmp1.GetReg()); in GenMulLong() 1330 NewLIR4(kThumb2AddRRR, res_hi.GetReg(), tmp1.GetReg(), res_hi.GetReg(), 0); in GenMulLong() [all …]
|