1 /* 2 * Copyright (C) 2014 The Android Open Source Project 3 * 4 * Licensed under the Apache License, Version 2.0 (the "License"); 5 * you may not use this file except in compliance with the License. 6 * You may obtain a copy of the License at 7 * 8 * http://www.apache.org/licenses/LICENSE-2.0 9 * 10 * Unless required by applicable law or agreed to in writing, software 11 * distributed under the License is distributed on an "AS IS" BASIS, 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 13 * See the License for the specific language governing permissions and 14 * limitations under the License. 15 */ 16 17 #ifndef ART_RUNTIME_ARCH_ARM_INSTRUCTION_SET_FEATURES_ARM_H_ 18 #define ART_RUNTIME_ARCH_ARM_INSTRUCTION_SET_FEATURES_ARM_H_ 19 20 #include "arch/instruction_set_features.h" 21 22 namespace art { 23 24 // Instruction set features relevant to the ARM architecture. 25 class ArmInstructionSetFeatures FINAL : public InstructionSetFeatures { 26 public: 27 // Process a CPU variant string like "krait" or "cortex-a15" and create InstructionSetFeatures. 28 static const ArmInstructionSetFeatures* FromVariant(const std::string& variant, 29 std::string* error_msg); 30 31 // Parse a bitmap and create an InstructionSetFeatures. 32 static const ArmInstructionSetFeatures* FromBitmap(uint32_t bitmap); 33 34 // Turn C pre-processor #defines into the equivalent instruction set features. 35 static const ArmInstructionSetFeatures* FromCppDefines(); 36 37 // Process /proc/cpuinfo and use kRuntimeISA to produce InstructionSetFeatures. 38 static const ArmInstructionSetFeatures* FromCpuInfo(); 39 40 // Process the auxiliary vector AT_HWCAP entry and use kRuntimeISA to produce 41 // InstructionSetFeatures. 42 static const ArmInstructionSetFeatures* FromHwcap(); 43 44 // Use assembly tests of the current runtime (ie kRuntimeISA) to determine the 45 // InstructionSetFeatures. This works around kernel bugs in AT_HWCAP and /proc/cpuinfo. 46 static const ArmInstructionSetFeatures* FromAssembly(); 47 48 bool Equals(const InstructionSetFeatures* other) const OVERRIDE; 49 GetInstructionSet()50 InstructionSet GetInstructionSet() const OVERRIDE { 51 return kArm; 52 } 53 54 uint32_t AsBitmap() const OVERRIDE; 55 56 // Return a string of the form "div,lpae" or "none". 57 std::string GetFeatureString() const OVERRIDE; 58 59 // Is the divide instruction feature enabled? HasDivideInstruction()60 bool HasDivideInstruction() const { 61 return has_div_; 62 } 63 64 // Are the ldrd and strd instructions atomic? This is commonly true when the Large Physical 65 // Address Extension (LPAE) is present. HasAtomicLdrdAndStrd()66 bool HasAtomicLdrdAndStrd() const { 67 return has_atomic_ldrd_strd_; 68 } 69 ~ArmInstructionSetFeatures()70 virtual ~ArmInstructionSetFeatures() {} 71 72 protected: 73 // Parse a vector of the form "div", "lpae" adding these to a new ArmInstructionSetFeatures. 74 const InstructionSetFeatures* 75 AddFeaturesFromSplitString(const bool smp, const std::vector<std::string>& features, 76 std::string* error_msg) const OVERRIDE; 77 78 private: ArmInstructionSetFeatures(bool smp,bool has_div,bool has_atomic_ldrd_strd)79 ArmInstructionSetFeatures(bool smp, bool has_div, bool has_atomic_ldrd_strd) 80 : InstructionSetFeatures(smp), 81 has_div_(has_div), has_atomic_ldrd_strd_(has_atomic_ldrd_strd) { 82 } 83 84 // Bitmap positions for encoding features as a bitmap. 85 enum { 86 kSmpBitfield = 1, 87 kDivBitfield = 2, 88 kAtomicLdrdStrdBitfield = 4, 89 }; 90 91 const bool has_div_; 92 const bool has_atomic_ldrd_strd_; 93 94 DISALLOW_COPY_AND_ASSIGN(ArmInstructionSetFeatures); 95 }; 96 97 } // namespace art 98 99 #endif // ART_RUNTIME_ARCH_ARM_INSTRUCTION_SET_FEATURES_ARM_H_ 100