1; RUN: llc < %s -march=bpf -show-mc-encoding | FileCheck %s 2; test little endian only for now 3 4define zeroext i8 @lshr8(i8 zeroext %a, i8 zeroext %cnt) nounwind readnone { 5entry: 6; CHECK-LABEL: lshr8: 7; CHECK: srl r1, r2 # encoding: [0x7f,0x21,0x00,0x00,0x00,0x00,0x00,0x00] 8 %shr = lshr i8 %a, %cnt 9 ret i8 %shr 10} 11 12define signext i8 @ashr8(i8 signext %a, i8 zeroext %cnt) nounwind readnone { 13entry: 14; CHECK-LABEL: ashr8: 15; CHECK: sra r1, r2 # encoding: [0xcf,0x21,0x00,0x00,0x00,0x00,0x00,0x00] 16 %shr = ashr i8 %a, %cnt 17 ret i8 %shr 18} 19 20define zeroext i8 @shl8(i8 zeroext %a, i8 zeroext %cnt) nounwind readnone { 21entry: 22; CHECK: shl8 23; CHECK: sll r1, r2 # encoding: [0x6f,0x21,0x00,0x00,0x00,0x00,0x00,0x00] 24 %shl = shl i8 %a, %cnt 25 ret i8 %shl 26} 27 28define zeroext i16 @lshr16(i16 zeroext %a, i16 zeroext %cnt) nounwind readnone { 29entry: 30; CHECK-LABEL: lshr16: 31; CHECK: srl r1, r2 # encoding: [0x7f,0x21,0x00,0x00,0x00,0x00,0x00,0x00] 32 %shr = lshr i16 %a, %cnt 33 ret i16 %shr 34} 35 36define signext i16 @ashr16(i16 signext %a, i16 zeroext %cnt) nounwind readnone { 37entry: 38; CHECK-LABEL: ashr16: 39; CHECK: sra r1, r2 # encoding: [0xcf,0x21,0x00,0x00,0x00,0x00,0x00,0x00] 40 %shr = ashr i16 %a, %cnt 41 ret i16 %shr 42} 43 44define zeroext i16 @shl16(i16 zeroext %a, i16 zeroext %cnt) nounwind readnone { 45entry: 46; CHECK-LABEL: shl16: 47; CHECK: sll r1, r2 # encoding: [0x6f,0x21,0x00,0x00,0x00,0x00,0x00,0x00] 48 %shl = shl i16 %a, %cnt 49 ret i16 %shl 50} 51 52define zeroext i32 @lshr32(i32 zeroext %a, i32 zeroext %cnt) nounwind readnone { 53entry: 54; CHECK-LABEL: lshr32: 55; CHECK: srl r1, r2 # encoding: [0x7f,0x21,0x00,0x00,0x00,0x00,0x00,0x00] 56; CHECK: slli r1, 32 # encoding: [0x67,0x01,0x00,0x00,0x20,0x00,0x00,0x00] 57 %shr = lshr i32 %a, %cnt 58 ret i32 %shr 59} 60 61define signext i32 @ashr32(i32 signext %a, i32 zeroext %cnt) nounwind readnone { 62entry: 63; CHECK-LABEL: ashr32: 64; CHECK: sra r1, r2 # encoding: [0xcf,0x21,0x00,0x00,0x00,0x00,0x00,0x00] 65 %shr = ashr i32 %a, %cnt 66 ret i32 %shr 67} 68 69define zeroext i32 @shl32(i32 zeroext %a, i32 zeroext %cnt) nounwind readnone { 70entry: 71; CHECK-LABEL: shl32: 72; CHECK: sll r1, r2 # encoding: [0x6f,0x21,0x00,0x00,0x00,0x00,0x00,0x00] 73 %shl = shl i32 %a, %cnt 74 ret i32 %shl 75} 76 77define zeroext i64 @lshr64(i64 zeroext %a, i64 zeroext %cnt) nounwind readnone { 78entry: 79; CHECK-LABEL: lshr64: 80; CHECK: srl r1, r2 # encoding: [0x7f,0x21,0x00,0x00,0x00,0x00,0x00,0x00] 81 %shr = lshr i64 %a, %cnt 82 ret i64 %shr 83} 84 85define signext i64 @ashr64(i64 signext %a, i64 zeroext %cnt) nounwind readnone { 86entry: 87; CHECK-LABEL: ashr64: 88; CHECK: sra r1, r2 # encoding: [0xcf,0x21,0x00,0x00,0x00,0x00,0x00,0x00] 89 %shr = ashr i64 %a, %cnt 90 ret i64 %shr 91} 92 93define zeroext i64 @shl64(i64 zeroext %a, i64 zeroext %cnt) nounwind readnone { 94entry: 95; CHECK-LABEL: shl64: 96; CHECK: sll r1, r2 # encoding: [0x6f,0x21,0x00,0x00,0x00,0x00,0x00,0x00] 97; CHECK: mov r0, r1 # encoding: [0xbf,0x10,0x00,0x00,0x00,0x00,0x00,0x00] 98; CHECK: ret # encoding: [0x95,0x00,0x00,0x00,0x00,0x00,0x00,0x00] 99 %shl = shl i64 %a, %cnt 100 ret i64 %shl 101} 102