Lines Matching refs:dd
343 void Arm32Assembler::vmovd(DRegister dd, DRegister dm, Condition cond) { in vmovd() argument
344 EmitVFPddd(cond, B23 | B21 | B20 | B6, dd, D0, dm); in vmovd()
363 bool Arm32Assembler::vmovd(DRegister dd, double d_imm, Condition cond) { in vmovd() argument
371 dd, D0, D0); in vmovd()
384 void Arm32Assembler::vaddd(DRegister dd, DRegister dn, DRegister dm, in vaddd() argument
386 EmitVFPddd(cond, B21 | B20, dd, dn, dm); in vaddd()
396 void Arm32Assembler::vsubd(DRegister dd, DRegister dn, DRegister dm, in vsubd() argument
398 EmitVFPddd(cond, B21 | B20 | B6, dd, dn, dm); in vsubd()
408 void Arm32Assembler::vmuld(DRegister dd, DRegister dn, DRegister dm, in vmuld() argument
410 EmitVFPddd(cond, B21, dd, dn, dm); in vmuld()
420 void Arm32Assembler::vmlad(DRegister dd, DRegister dn, DRegister dm, in vmlad() argument
422 EmitVFPddd(cond, 0, dd, dn, dm); in vmlad()
432 void Arm32Assembler::vmlsd(DRegister dd, DRegister dn, DRegister dm, in vmlsd() argument
434 EmitVFPddd(cond, B6, dd, dn, dm); in vmlsd()
444 void Arm32Assembler::vdivd(DRegister dd, DRegister dn, DRegister dm, in vdivd() argument
446 EmitVFPddd(cond, B23, dd, dn, dm); in vdivd()
455 void Arm32Assembler::vabsd(DRegister dd, DRegister dm, Condition cond) { in vabsd() argument
456 EmitVFPddd(cond, B23 | B21 | B20 | B7 | B6, dd, D0, dm); in vabsd()
465 void Arm32Assembler::vnegd(DRegister dd, DRegister dm, Condition cond) { in vnegd() argument
466 EmitVFPddd(cond, B23 | B21 | B20 | B16 | B6, dd, D0, dm); in vnegd()
474 void Arm32Assembler::vsqrtd(DRegister dd, DRegister dm, Condition cond) { in vsqrtd() argument
475 EmitVFPddd(cond, B23 | B21 | B20 | B16 | B7 | B6, dd, D0, dm); in vsqrtd()
484 void Arm32Assembler::vcvtds(DRegister dd, SRegister sm, Condition cond) { in vcvtds() argument
485 EmitVFPds(cond, B23 | B21 | B20 | B18 | B17 | B16 | B7 | B6, dd, sm); in vcvtds()
504 void Arm32Assembler::vcvtdi(DRegister dd, SRegister sm, Condition cond) { in vcvtdi() argument
505 EmitVFPds(cond, B23 | B21 | B20 | B19 | B8 | B7 | B6, dd, sm); in vcvtdi()
524 void Arm32Assembler::vcvtdu(DRegister dd, SRegister sm, Condition cond) { in vcvtdu() argument
525 EmitVFPds(cond, B23 | B21 | B20 | B19 | B8 | B6, dd, sm); in vcvtdu()
534 void Arm32Assembler::vcmpd(DRegister dd, DRegister dm, Condition cond) { in vcmpd() argument
535 EmitVFPddd(cond, B23 | B21 | B20 | B18 | B6, dd, D0, dm); in vcmpd()
544 void Arm32Assembler::vcmpdz(DRegister dd, Condition cond) { in vcmpdz() argument
545 EmitVFPddd(cond, B23 | B21 | B20 | B18 | B16 | B6, dd, D0, D0); in vcmpdz()
1062 void Arm32Assembler::vldrd(DRegister dd, const Address& ad, Condition cond) { in vldrd() argument
1064 CHECK_NE(dd, kNoDRegister); in vldrd()
1068 ((static_cast<int32_t>(dd) >> 4)*B22) | in vldrd()
1069 ((static_cast<int32_t>(dd) & 0xf)*B12) | in vldrd()
1075 void Arm32Assembler::vstrd(DRegister dd, const Address& ad, Condition cond) { in vstrd() argument
1078 CHECK_NE(dd, kNoDRegister); in vstrd()
1082 ((static_cast<int32_t>(dd) >> 4)*B22) | in vstrd()
1083 ((static_cast<int32_t>(dd) & 0xf)*B12) | in vstrd()
1154 DRegister dd, DRegister dn, DRegister dm) { in EmitVFPddd() argument
1155 CHECK_NE(dd, kNoDRegister); in EmitVFPddd()
1161 ((static_cast<int32_t>(dd) >> 4)*B22) | in EmitVFPddd()
1163 ((static_cast<int32_t>(dd) & 0xf)*B12) | in EmitVFPddd()
1187 DRegister dd, SRegister sm) { in EmitVFPds() argument
1188 CHECK_NE(dd, kNoDRegister); in EmitVFPds()
1193 ((static_cast<int32_t>(dd) >> 4)*B22) | in EmitVFPds()
1194 ((static_cast<int32_t>(dd) & 0xf)*B12) | in EmitVFPds()
1391 void Arm32Assembler::LoadLiteral(DRegister dd ATTRIBUTE_UNUSED, in LoadLiteral()