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Lines Matching refs:v10

211     ld1         {v10.4h},[x0],x6
230 smull v20.4s, v10.4h, v0.h[0]
234 smull v22.4s, v10.4h, v0.h[0]
237 smull v16.4s, v10.4h, v0.h[0]
240 smull v18.4s, v10.4h, v0.h[0]
280 ld1 {v10.4h},[x0],x6
300 smlal v20.4s, v10.4h, v2.h[0]
304 smlal v22.4s, v10.4h, v6.h[0]
307 smlsl v16.4s, v10.4h, v6.h[0]
310 smlsl v18.4s, v10.4h, v2.h[0]
355 ld1 {v10.4h},[x0],x6
376 smlal v20.4s, v10.4h, v0.h[0]
380 smlsl v22.4s, v10.4h, v0.h[0]
383 smlsl v16.4s, v10.4h, v0.h[0]
386 smlal v18.4s, v10.4h, v0.h[0]
421 ld1 {v10.4h},[x0],x6
446 smlal v20.4s, v10.4h, v6.h[0]
450 smlsl v22.4s, v10.4h, v2.h[0]
453 smlal v16.4s, v10.4h, v2.h[0]
456 smlsl v18.4s, v10.4h, v6.h[0]
490 sub v10.4s, v20.4s , v24.4s
504 sqrshrn v19.4h, v10.4s,#shift_stage1_idct //// x7 = (a0 - b0 + rnd) >> 7(shift_stage1_idct)
569 ld1 {v10.4h},[x0],x6
591 smull v20.4s, v10.4h, v0.h[0]
595 smull v22.4s, v10.4h, v0.h[0]
598 smull v16.4s, v10.4h, v0.h[0]
601 smull v18.4s, v10.4h, v0.h[0]
637 ld1 {v10.4h},[x0],x6
662 smlsl v20.4s, v10.4h, v2.h[0]
666 smlsl v22.4s, v10.4h, v6.h[0]
669 smlal v16.4s, v10.4h, v6.h[0]
672 smlal v18.4s, v10.4h, v2.h[0]
714 ld1 {v10.4h},[x0],x6
739 smlal v20.4s, v10.4h, v0.h[0]
743 smlsl v22.4s, v10.4h, v0.h[0]
746 smlsl v16.4s, v10.4h, v0.h[0]
749 smlal v18.4s, v10.4h, v0.h[0]
781 ld1 {v10.4h},[x0],x6
803 smlsl v20.4s, v10.4h, v6.h[0]
807 smlal v22.4s, v10.4h, v2.h[0]
810 smlsl v16.4s, v10.4h, v2.h[0]
813 smlal v18.4s, v10.4h, v6.h[0]
849 sub v10.4s, v20.4s , v24.4s
863 sqrshrn v19.4h, v10.4s,#shift_stage1_idct //// x7 = (a0 - b0 + rnd) >> 7(shift_stage1_idct)
911 ld1 {v10.4h},[x0],x6
931 smull v20.4s, v10.4h, v0.h[0]
935 smull v22.4s, v10.4h, v0.h[0]
938 smull v16.4s, v10.4h, v0.h[0]
941 smull v18.4s, v10.4h, v0.h[0]
979 ld1 {v10.4h},[x0],x6
998 smlal v20.4s, v10.4h, v2.h[0]
1002 smlal v22.4s, v10.4h, v6.h[0]
1005 smlsl v16.4s, v10.4h, v6.h[0]
1008 smlsl v18.4s, v10.4h, v2.h[0]
1051 ld1 {v10.4h},[x0],x6
1071 smlal v20.4s, v10.4h, v0.h[0]
1075 smlsl v22.4s, v10.4h, v0.h[0]
1078 smlsl v16.4s, v10.4h, v0.h[0]
1081 smlal v18.4s, v10.4h, v0.h[0]
1115 ld1 {v10.4h},[x0],x6
1137 smlal v20.4s, v10.4h, v6.h[0]
1141 smlsl v22.4s, v10.4h, v2.h[0]
1144 smlal v16.4s, v10.4h, v2.h[0]
1147 smlsl v18.4s, v10.4h, v6.h[0]
1179 sub v10.4s, v20.4s , v24.4s
1193 sqrshrn v19.4h, v10.4s,#shift_stage1_idct //// x7 = (a0 - b0 + rnd) >> 7(shift_stage1_idct)
1241 ld1 {v10.4h},[x0],x6
1261 smull v20.4s, v10.4h, v0.h[0]
1265 smull v22.4s, v10.4h, v0.h[0]
1268 smull v16.4s, v10.4h, v0.h[0]
1271 smull v18.4s, v10.4h, v0.h[0]
1311 ld1 {v10.4h},[x0],x6
1332 smlsl v20.4s, v10.4h, v2.h[0]
1336 smlsl v22.4s, v10.4h, v6.h[0]
1339 smlal v16.4s, v10.4h, v6.h[0]
1342 smlal v18.4s, v10.4h, v2.h[0]
1384 ld1 {v10.4h},[x0],x6
1404 smlal v20.4s, v10.4h, v0.h[0]
1408 smlsl v22.4s, v10.4h, v0.h[0]
1411 smlsl v16.4s, v10.4h, v0.h[0]
1414 smlal v18.4s, v10.4h, v0.h[0]
1452 ld1 {v10.4h},[x0],x6
1475 smlsl v20.4s, v10.4h, v6.h[0]
1479 smlal v22.4s, v10.4h, v2.h[0]
1482 smlsl v16.4s, v10.4h, v2.h[0]
1485 smlal v18.4s, v10.4h, v6.h[0]
1520 sub v10.4s, v20.4s , v24.4s
1534 sqrshrn v19.4h, v10.4s,#shift_stage1_idct //// x7 = (a0 - b0 + rnd) >> 7(shift_stage1_idct)
1618 ld1 {v10.4h, v11.4h},[x1],#16
1633 smull v20.4s, v10.4h, v0.h[0]
1637 smull v22.4s, v10.4h, v0.h[0]
1640 smull v16.4s, v10.4h, v0.h[0]
1643 smull v18.4s, v10.4h, v0.h[0]
1679 ld1 {v10.4h, v11.4h},[x1],#16
1696 smlal v20.4s, v10.4h, v2.h[0]
1700 smlal v22.4s, v10.4h, v6.h[0]
1703 smlsl v16.4s, v10.4h, v6.h[0]
1706 smlsl v18.4s, v10.4h, v2.h[0]
1745 ld1 {v10.4h, v11.4h},[x1],#16
1763 smlal v20.4s, v10.4h, v0.h[0]
1767 smlsl v22.4s, v10.4h, v0.h[0]
1770 smlsl v16.4s, v10.4h, v0.h[0]
1773 smlal v18.4s, v10.4h, v0.h[0]
1805 ld1 {v10.4h, v11.4h},[x1],#16
1825 smlal v20.4s, v10.4h, v6.h[0]
1829 smlsl v22.4s, v10.4h, v2.h[0]
1832 smlal v16.4s, v10.4h, v2.h[0]
1835 smlsl v18.4s, v10.4h, v6.h[0]
1864 sub v10.4s, v20.4s , v24.4s
1878 sqrshrn v19.4h, v10.4s,#shift_stage2_idct //// x7 = (a0 - b0 + rnd) >> 7(shift_stage2_idct)
1929 ld1 {v10.4h, v11.4h},[x1],#16
1947 smull v20.4s, v10.4h, v0.h[0]
1951 smull v22.4s, v10.4h, v0.h[0]
1954 smull v16.4s, v10.4h, v0.h[0]
1957 smull v18.4s, v10.4h, v0.h[0]
1991 ld1 {v10.4h, v11.4h},[x1],#16
2012 smlsl v20.4s, v10.4h, v2.h[0]
2016 smlsl v22.4s, v10.4h, v6.h[0]
2019 smlal v16.4s, v10.4h, v6.h[0]
2022 smlal v18.4s, v10.4h, v2.h[0]
2062 ld1 {v10.4h, v11.4h},[x1],#16
2081 smlal v20.4s, v10.4h, v0.h[0]
2085 smlsl v22.4s, v10.4h, v0.h[0]
2088 smlsl v16.4s, v10.4h, v0.h[0]
2091 smlal v18.4s, v10.4h, v0.h[0]
2122 ld1 {v10.4h, v11.4h},[x1],#16
2140 smlsl v20.4s, v10.4h, v6.h[0]
2144 smlal v22.4s, v10.4h, v2.h[0]
2147 smlsl v16.4s, v10.4h, v2.h[0]
2150 smlal v18.4s, v10.4h, v6.h[0]
2182 sub v10.4s, v20.4s , v24.4s
2196 sqrshrn v19.4h, v10.4s,#shift_stage2_idct //// x7 = (a0 - b0 + rnd) >> 7(shift_stage2_idct)
2245 ld1 {v10.4h, v11.4h},[x1],#16
2262 smull v20.4s, v10.4h, v0.h[0]
2266 smull v22.4s, v10.4h, v0.h[0]
2269 smull v16.4s, v10.4h, v0.h[0]
2272 smull v18.4s, v10.4h, v0.h[0]
2305 ld1 {v10.4h, v11.4h},[x1],#16
2324 smlal v20.4s, v10.4h, v2.h[0]
2328 smlal v22.4s, v10.4h, v6.h[0]
2331 smlsl v16.4s, v10.4h, v6.h[0]
2334 smlsl v18.4s, v10.4h, v2.h[0]
2372 ld1 {v10.4h, v11.4h},[x1],#16
2390 smlal v20.4s, v10.4h, v0.h[0]
2394 smlsl v22.4s, v10.4h, v0.h[0]
2397 smlsl v16.4s, v10.4h, v0.h[0]
2400 smlal v18.4s, v10.4h, v0.h[0]
2431 ld1 {v10.4h, v11.4h},[x1],#16
2449 smlal v20.4s, v10.4h, v6.h[0]
2453 smlsl v22.4s, v10.4h, v2.h[0]
2456 smlal v16.4s, v10.4h, v2.h[0]
2459 smlsl v18.4s, v10.4h, v6.h[0]
2490 sub v10.4s, v20.4s , v24.4s
2504 sqrshrn v19.4h, v10.4s,#shift_stage2_idct //// x11 = (a0 - b0 + rnd) >> 7(shift_stage2_idct)
2554 ld1 {v10.4h, v11.4h},[x1],#16
2572 smull v20.4s, v10.4h, v0.h[0]
2576 smull v22.4s, v10.4h, v0.h[0]
2579 smull v16.4s, v10.4h, v0.h[0]
2582 smull v18.4s, v10.4h, v0.h[0]
2619 ld1 {v10.4h, v11.4h},[x1],#16
2638 smlsl v20.4s, v10.4h, v2.h[0]
2642 smlsl v22.4s, v10.4h, v6.h[0]
2645 smlal v16.4s, v10.4h, v6.h[0]
2648 smlal v18.4s, v10.4h, v2.h[0]
2688 ld1 {v10.4h, v11.4h},[x1],#16
2706 smlal v20.4s, v10.4h, v0.h[0]
2710 smlsl v22.4s, v10.4h, v0.h[0]
2713 smlsl v16.4s, v10.4h, v0.h[0]
2716 smlal v18.4s, v10.4h, v0.h[0]
2747 ld1 {v10.4h, v11.4h},[x1],#16
2767 smlsl v20.4s, v10.4h, v6.h[0]
2771 smlal v22.4s, v10.4h, v2.h[0]
2774 smlsl v16.4s, v10.4h, v2.h[0]
2777 smlal v18.4s, v10.4h, v6.h[0]
2809 sub v10.4s, v20.4s , v24.4s
2823 sqrshrn v19.4h, v10.4s,#shift_stage2_idct //// x11 = (a0 - b0 + rnd) >> 7(shift_stage2_idct)
2936 ld1 {v10.8b, v11.8b},[x2],x8
2943 uaddw v14.8h, v14.8h , v10.8b
3011 ld1 {v10.8b, v11.8b},[x2],x8
3018 uaddw v14.8h, v14.8h , v10.8b