Lines Matching refs:getNode
1181 return DAG.getNode(AArch64ISD::FCMP, dl, VT, LHS, RHS); in emitComparison()
1213 return DAG.getNode(Opcode, dl, DAG.getVTList(VT, MVT_CC), LHS, RHS) in emitComparison()
1278 return DAG.getNode(Opcode, DL, MVT_CC, LHS, RHS, NZCVOp, Condition, CCOp); in emitConditionalComparison()
1353 if (!CCOp.getNode()) in emitConjunctionDisjunctionTree()
1369 if (!CCOp.getNode()) in emitConjunctionDisjunctionTree()
1437 if (ConstantSDNode *RHSC = dyn_cast<ConstantSDNode>(RHS.getNode())) { in getAArch64Cmp()
1515 LHS.getNode()->hasNUsesOfValue(1, 0)) { in getAArch64Cmp()
1519 DAG.getNode(ISD::SIGN_EXTEND_INREG, dl, LHS.getValueType(), LHS, in getAArch64Cmp()
1583 LHS = DAG.getNode(ExtendOpc, DL, MVT::i64, LHS); in getAArch64XALUOOp()
1584 RHS = DAG.getNode(ExtendOpc, DL, MVT::i64, RHS); in getAArch64XALUOOp()
1585 SDValue Mul = DAG.getNode(ISD::MUL, DL, MVT::i64, LHS, RHS); in getAArch64XALUOOp()
1586 SDValue Add = DAG.getNode(ISD::ADD, DL, MVT::i64, Mul, in getAArch64XALUOOp()
1592 Value = DAG.getNode(ISD::TRUNCATE, DL, MVT::i32, Add); in getAArch64XALUOOp()
1599 SDValue UpperBits = DAG.getNode(ISD::SRL, DL, MVT::i64, Add, in getAArch64XALUOOp()
1601 UpperBits = DAG.getNode(ISD::TRUNCATE, DL, MVT::i32, UpperBits); in getAArch64XALUOOp()
1602 SDValue LowerBits = DAG.getNode(ISD::SRA, DL, MVT::i32, Value, in getAArch64XALUOOp()
1607 Overflow = DAG.getNode(AArch64ISD::SUBS, DL, VTs, UpperBits, LowerBits) in getAArch64XALUOOp()
1615 SDValue UpperBits = DAG.getNode(ISD::SRL, DL, MVT::i64, Mul, in getAArch64XALUOOp()
1619 DAG.getNode(AArch64ISD::SUBS, DL, VTs, in getAArch64XALUOOp()
1627 Value = DAG.getNode(ISD::MUL, DL, MVT::i64, LHS, RHS); in getAArch64XALUOOp()
1629 SDValue UpperBits = DAG.getNode(ISD::MULHS, DL, MVT::i64, LHS, RHS); in getAArch64XALUOOp()
1630 SDValue LowerBits = DAG.getNode(ISD::SRA, DL, MVT::i64, Value, in getAArch64XALUOOp()
1635 Overflow = DAG.getNode(AArch64ISD::SUBS, DL, VTs, UpperBits, LowerBits) in getAArch64XALUOOp()
1638 SDValue UpperBits = DAG.getNode(ISD::MULHU, DL, MVT::i64, LHS, RHS); in getAArch64XALUOOp()
1641 DAG.getNode(AArch64ISD::SUBS, DL, VTs, in getAArch64XALUOOp()
1653 Value = DAG.getNode(Opc, DL, VTs, LHS, RHS); in getAArch64XALUOOp()
1714 TVal = DAG.getNode(ISD::XOR, dl, Other.getValueType(), Other, in LowerXOR()
1717 return DAG.getNode(AArch64ISD::CSEL, dl, Sel.getValueType(), FVal, TVal, in LowerXOR()
1755 return DAG.getNode(Opc, SDLoc(Op), VTs, Op.getOperand(0), Op.getOperand(1)); in LowerADDC_ADDE_SUBC_SUBE()
1756 return DAG.getNode(Opc, SDLoc(Op), VTs, Op.getOperand(0), Op.getOperand(1), in LowerADDC_ADDE_SUBC_SUBE()
1779 Overflow = DAG.getNode(AArch64ISD::CSEL, dl, MVT::i32, FVal, TVal, in LowerXALUO()
1783 return DAG.getNode(ISD::MERGE_VALUES, dl, VTs, Value, Overflow); in LowerXALUO()
1813 return DAG.getNode(AArch64ISD::PREFETCH, DL, MVT::Other, Op.getOperand(0), in LowerPREFETCH()
1857 return DAG.getNode( in LowerVectorFP_TO_INT()
1859 DAG.getNode(ISD::FP_EXTEND, dl, NewVT, Op.getOperand(0))); in LowerVectorFP_TO_INT()
1865 DAG.getNode(Op.getOpcode(), dl, InVT.changeVectorElementTypeToInteger(), in LowerVectorFP_TO_INT()
1867 return DAG.getNode(ISD::TRUNCATE, dl, VT, Cv); in LowerVectorFP_TO_INT()
1875 SDValue Ext = DAG.getNode(ISD::FP_EXTEND, dl, ExtVT, Op.getOperand(0)); in LowerVectorFP_TO_INT()
1876 return DAG.getNode(Op.getOpcode(), dl, VT, Ext); in LowerVectorFP_TO_INT()
1891 return DAG.getNode( in LowerFP_TO_INT()
1893 DAG.getNode(ISD::FP_EXTEND, dl, MVT::f32, Op.getOperand(0))); in LowerFP_TO_INT()
1924 In = DAG.getNode(Op.getOpcode(), dl, CastVT, In); in LowerVectorINT_TO_FP()
1925 return DAG.getNode(ISD::FP_ROUND, dl, VT, In, DAG.getIntPtrConstant(0, dl)); in LowerVectorINT_TO_FP()
1932 In = DAG.getNode(CastOpc, dl, CastVT, In); in LowerVectorINT_TO_FP()
1933 return DAG.getNode(Op.getOpcode(), dl, VT, In); in LowerVectorINT_TO_FP()
1947 return DAG.getNode( in LowerINT_TO_FP()
1949 DAG.getNode(Op.getOpcode(), dl, MVT::f32, Op.getOperand(0)), in LowerINT_TO_FP()
2010 Op = DAG.getNode(ISD::ANY_EXTEND, DL, MVT::i32, Op.getOperand(0)); in LowerBITCAST()
2011 Op = DAG.getNode(ISD::BITCAST, DL, MVT::f32, Op); in LowerBITCAST()
2049 return DAG.getNode(ExtOpcode, SDLoc(N), NewVT, N); in addRequiredExtensionForVectorMULL()
2099 return DAG.getNode(ISD::BUILD_VECTOR, dl, in skipExtensionForVectorMULL()
2122 SDNode *N0 = N->getOperand(0).getNode(); in isAddSubSExt()
2123 SDNode *N1 = N->getOperand(1).getNode(); in isAddSubSExt()
2133 SDNode *N0 = N->getOperand(0).getNode(); in isAddSubZExt()
2134 SDNode *N1 = N->getOperand(1).getNode(); in isAddSubZExt()
2147 SDNode *N0 = Op.getOperand(0).getNode(); in LowerMUL()
2148 SDNode *N1 = Op.getOperand(1).getNode(); in LowerMUL()
2195 return DAG.getNode(NewOpc, DL, VT, Op0, Op1); in LowerMUL()
2200 SDValue N00 = skipExtensionForVectorMULL(N0->getOperand(0).getNode(), DAG); in LowerMUL()
2201 SDValue N01 = skipExtensionForVectorMULL(N0->getOperand(1).getNode(), DAG); in LowerMUL()
2203 return DAG.getNode(N0->getOpcode(), DL, VT, in LowerMUL()
2204 DAG.getNode(NewOpc, DL, VT, in LowerMUL()
2205 DAG.getNode(ISD::BITCAST, DL, Op1VT, N00), Op1), in LowerMUL()
2206 DAG.getNode(NewOpc, DL, VT, in LowerMUL()
2207 DAG.getNode(ISD::BITCAST, DL, Op1VT, N01), Op1)); in LowerMUL()
2218 return DAG.getNode(AArch64ISD::THREAD_POINTER, dl, PtrVT); in LowerINTRINSIC_WO_CHAIN()
2221 return DAG.getNode(ISD::SMAX, dl, Op.getValueType(), in LowerINTRINSIC_WO_CHAIN()
2224 return DAG.getNode(ISD::UMAX, dl, Op.getValueType(), in LowerINTRINSIC_WO_CHAIN()
2227 return DAG.getNode(ISD::SMIN, dl, Op.getValueType(), in LowerINTRINSIC_WO_CHAIN()
2230 return DAG.getNode(ISD::UMIN, dl, Op.getValueType(), in LowerINTRINSIC_WO_CHAIN()
2465 ArgValue = DAG.getNode(ISD::BITCAST, DL, VA.getValVT(), ArgValue); in LowerFormalArguments()
2597 DAG.getNode(ISD::ADD, DL, PtrVT, FIN, DAG.getConstant(8, DL, PtrVT)); in saveVarArgRegisters()
2626 FIN = DAG.getNode(ISD::ADD, DL, PtrVT, FIN, in saveVarArgRegisters()
2635 Chain = DAG.getNode(ISD::TokenFactor, DL, MVT::Other, MemOps); in saveVarArgRegisters()
2679 Val = DAG.getNode(ISD::BITCAST, DL, VA.getValVT(), Val); in LowerCallResult()
2823 for (SDNode::use_iterator U = DAG.getEntryNode().getNode()->use_begin(), in addTokenForArgument()
2824 UE = DAG.getEntryNode().getNode()->use_end(); in addTokenForArgument()
2839 return DAG.getNode(ISD::TokenFactor, SDLoc(Chain), MVT::Other, ArgChains); in addTokenForArgument()
3005 Arg = DAG.getNode(ISD::SIGN_EXTEND, DL, VA.getLocVT(), Arg); in LowerCall()
3008 Arg = DAG.getNode(ISD::ZERO_EXTEND, DL, VA.getLocVT(), Arg); in LowerCall()
3013 Arg = DAG.getNode(ISD::TRUNCATE, DL, MVT::i1, Arg); in LowerCall()
3014 Arg = DAG.getNode(ISD::ZERO_EXTEND, DL, MVT::i8, Arg); in LowerCall()
3016 Arg = DAG.getNode(ISD::ANY_EXTEND, DL, VA.getLocVT(), Arg); in LowerCall()
3019 Arg = DAG.getNode(ISD::BITCAST, DL, VA.getLocVT(), Arg); in LowerCall()
3022 Arg = DAG.getNode(ISD::FP_EXTEND, DL, VA.getLocVT(), Arg); in LowerCall()
3055 PtrOff = DAG.getNode(ISD::ADD, DL, PtrVT, StackPtr, PtrOff); in LowerCall()
3072 DstAddr = DAG.getNode(ISD::ADD, DL, PtrVT, StackPtr, PtrOff); in LowerCall()
3093 Arg = DAG.getNode(ISD::TRUNCATE, DL, VA.getValVT(), Arg); in LowerCall()
3103 Chain = DAG.getNode(ISD::TokenFactor, DL, MVT::Other, MemOpChains); in LowerCall()
3127 Callee = DAG.getNode(AArch64ISD::LOADgot, DL, PtrVT, Callee); in LowerCall()
3133 Callee = DAG.getNode(AArch64ISD::LOADgot, DL, PtrVT, Callee); in LowerCall()
3186 if (InFlag.getNode()) in LowerCall()
3195 return DAG.getNode(AArch64ISD::TC_RETURN, DL, NodeTys, Ops); in LowerCall()
3199 Chain = DAG.getNode(AArch64ISD::CALL, DL, NodeTys, Ops); in LowerCall()
3261 Arg = DAG.getNode(ISD::TRUNCATE, DL, MVT::i1, Arg); in LowerReturn()
3262 Arg = DAG.getNode(ISD::ZERO_EXTEND, DL, VA.getLocVT(), Arg); in LowerReturn()
3266 Arg = DAG.getNode(ISD::BITCAST, DL, VA.getLocVT(), Arg); in LowerReturn()
3291 if (Flag.getNode()) in LowerReturn()
3294 return DAG.getNode(AArch64ISD::RET_FLAG, DL, MVT::Other, RetOps); in LowerReturn()
3318 return DAG.getNode(AArch64ISD::LOADgot, DL, PtrVT, GotAddr); in LowerGlobalAddress()
3325 SDValue ADRP = DAG.getNode(AArch64ISD::ADRP, DL, PtrVT, Hi); in LowerGlobalAddress()
3328 SDValue PoolAddr = DAG.getNode(AArch64ISD::ADDlow, DL, PtrVT, ADRP, Lo); in LowerGlobalAddress()
3336 return DAG.getNode(ISD::ADD, DL, PtrVT, GlobalAddr, in LowerGlobalAddress()
3343 return DAG.getNode( in LowerGlobalAddress()
3357 SDValue ADRP = DAG.getNode(AArch64ISD::ADRP, DL, PtrVT, Hi); in LowerGlobalAddress()
3358 return DAG.getNode(AArch64ISD::ADDlow, DL, PtrVT, ADRP, Lo); in LowerGlobalAddress()
3401 SDValue DescAddr = DAG.getNode(AArch64ISD::LOADgot, DL, PtrVT, TLVPAddr); in LowerDarwinGlobalTLSAddress()
3426 DAG.getNode(AArch64ISD::CALL, DL, DAG.getVTList(MVT::Other, MVT::Glue), in LowerDarwinGlobalTLSAddress()
3461 Chain = DAG.getNode(AArch64ISD::TLSDESC_CALLSEQ, DL, NodeTys, Ops); in LowerELFTLSDescCallSeq()
3495 SDValue ThreadBase = DAG.getNode(AArch64ISD::THREAD_POINTER, DL, PtrVT); in LowerELFGlobalTLSAddress()
3517 TPOff = DAG.getNode(AArch64ISD::LOADgot, DL, PtrVT, TPOff); in LowerELFGlobalTLSAddress()
3565 return DAG.getNode(ISD::ADD, DL, PtrVT, ThreadBase, TPOff); in LowerELFGlobalTLSAddress()
3593 if (!RHS.getNode()) { in LowerBR_CC()
3620 return DAG.getNode(AArch64ISD::BRCOND, dl, MVT::Other, Chain, Dest, CCVal, in LowerBR_CC()
3642 return DAG.getNode(AArch64ISD::TBZ, dl, MVT::Other, Chain, Test, in LowerBR_CC()
3647 return DAG.getNode(AArch64ISD::CBZ, dl, MVT::Other, Chain, LHS, Dest); in LowerBR_CC()
3658 return DAG.getNode(AArch64ISD::TBNZ, dl, MVT::Other, Chain, Test, in LowerBR_CC()
3663 return DAG.getNode(AArch64ISD::CBNZ, dl, MVT::Other, Chain, LHS, Dest); in LowerBR_CC()
3669 return DAG.getNode(AArch64ISD::TBNZ, dl, MVT::Other, Chain, LHS, in LowerBR_CC()
3679 return DAG.getNode(AArch64ISD::TBZ, dl, MVT::Other, Chain, LHS, in LowerBR_CC()
3685 return DAG.getNode(AArch64ISD::BRCOND, dl, MVT::Other, Chain, Dest, CCVal, in LowerBR_CC()
3698 DAG.getNode(AArch64ISD::BRCOND, dl, MVT::Other, Chain, Dest, CC1Val, Cmp); in LowerBR_CC()
3701 return DAG.getNode(AArch64ISD::BRCOND, dl, MVT::Other, BR1, Dest, CC2Val, in LowerBR_CC()
3718 In2 = DAG.getNode(ISD::FP_EXTEND, DL, VT, In2); in LowerFCOPYSIGN()
3720 In2 = DAG.getNode(ISD::FP_ROUND, DL, VT, In2, DAG.getIntPtrConstant(0, DL)); in LowerFCOPYSIGN()
3737 VecVal1 = DAG.getNode(ISD::BITCAST, DL, VecVT, In1); in LowerFCOPYSIGN()
3738 VecVal2 = DAG.getNode(ISD::BITCAST, DL, VecVT, In2); in LowerFCOPYSIGN()
3755 VecVal1 = DAG.getNode(ISD::BITCAST, DL, VecVT, In1); in LowerFCOPYSIGN()
3756 VecVal2 = DAG.getNode(ISD::BITCAST, DL, VecVT, In2); in LowerFCOPYSIGN()
3767 BuildVec = DAG.getNode(ISD::BITCAST, DL, MVT::v2f64, BuildVec); in LowerFCOPYSIGN()
3768 BuildVec = DAG.getNode(ISD::FNEG, DL, MVT::v2f64, BuildVec); in LowerFCOPYSIGN()
3769 BuildVec = DAG.getNode(ISD::BITCAST, DL, MVT::v2i64, BuildVec); in LowerFCOPYSIGN()
3773 DAG.getNode(AArch64ISD::BIT, DL, VecVT, VecVal1, VecVal2, BuildVec); in LowerFCOPYSIGN()
3780 return DAG.getNode(ISD::BITCAST, DL, VT, Sel); in LowerFCOPYSIGN()
3804 Val = DAG.getNode(ISD::ZERO_EXTEND, DL, MVT::i64, Val); in LowerCTPOP()
3805 Val = DAG.getNode(ISD::BITCAST, DL, MVT::v8i8, Val); in LowerCTPOP()
3807 SDValue CtPop = DAG.getNode(ISD::CTPOP, DL, MVT::v8i8, Val); in LowerCTPOP()
3808 SDValue UaddLV = DAG.getNode( in LowerCTPOP()
3813 UaddLV = DAG.getNode(ISD::ZERO_EXTEND, DL, MVT::i64, UaddLV); in LowerCTPOP()
3838 if (!RHS.getNode()) { in LowerSETCC()
3853 return DAG.getNode(AArch64ISD::CSEL, dl, VT, FVal, TVal, CCVal, Cmp); in LowerSETCC()
3872 return DAG.getNode(AArch64ISD::CSEL, dl, VT, FVal, TVal, CC1Val, Cmp); in LowerSETCC()
3882 DAG.getNode(AArch64ISD::CSEL, dl, VT, TVal, FVal, CC1Val, Cmp); in LowerSETCC()
3885 return DAG.getNode(AArch64ISD::CSEL, dl, VT, TVal, CS1, CC2Val, Cmp); in LowerSETCC()
3900 if (!RHS.getNode()) { in LowerSELECT_CC()
3908 LHS = DAG.getNode(ISD::FP_EXTEND, dl, MVT::f32, LHS); in LowerSELECT_CC()
3909 RHS = DAG.getNode(ISD::FP_EXTEND, dl, MVT::f32, RHS); in LowerSELECT_CC()
4003 return DAG.getNode(Opcode, dl, VT, TVal, FVal, CCVal, Cmp); in LowerSELECT_CC()
4017 SDValue CS1 = DAG.getNode(AArch64ISD::CSEL, dl, VT, TVal, FVal, CC1Val, Cmp); in LowerSELECT_CC()
4023 return DAG.getNode(AArch64ISD::CSEL, dl, VT, TVal, CS1, CC2Val, Cmp); in LowerSELECT_CC()
4063 return DAG.getNode(AArch64ISD::CSEL, DL, Op.getValueType(), TVal, FVal, in LowerSELECT()
4093 return DAG.getNode( in LowerJumpTable()
4106 SDValue ADRP = DAG.getNode(AArch64ISD::ADRP, DL, PtrVT, Hi); in LowerJumpTable()
4107 return DAG.getNode(AArch64ISD::ADDlow, DL, PtrVT, ADRP, Lo); in LowerJumpTable()
4122 return DAG.getNode(AArch64ISD::LOADgot, DL, PtrVT, GotAddr); in LowerConstantPool()
4126 return DAG.getNode( in LowerConstantPool()
4146 SDValue ADRP = DAG.getNode(AArch64ISD::ADRP, DL, PtrVT, Hi); in LowerConstantPool()
4147 return DAG.getNode(AArch64ISD::ADDlow, DL, PtrVT, ADRP, Lo); in LowerConstantPool()
4159 return DAG.getNode( in LowerBlockAddress()
4169 SDValue ADRP = DAG.getNode(AArch64ISD::ADRP, DL, PtrVT, Hi); in LowerBlockAddress()
4170 return DAG.getNode(AArch64ISD::ADDlow, DL, PtrVT, ADRP, Lo); in LowerBlockAddress()
4212 DAG.getNode(ISD::ADD, DL, PtrVT, VAList, DAG.getConstant(8, DL, PtrVT)); in LowerAAPCS_VASTART()
4215 GRTop = DAG.getNode(ISD::ADD, DL, PtrVT, GRTop, in LowerAAPCS_VASTART()
4226 VRTopAddr = DAG.getNode(ISD::ADD, DL, PtrVT, VAList, in LowerAAPCS_VASTART()
4230 VRTop = DAG.getNode(ISD::ADD, DL, PtrVT, VRTop, in LowerAAPCS_VASTART()
4239 DAG.getNode(ISD::ADD, DL, PtrVT, VAList, DAG.getConstant(24, DL, PtrVT)); in LowerAAPCS_VASTART()
4247 DAG.getNode(ISD::ADD, DL, PtrVT, VAList, DAG.getConstant(28, DL, PtrVT)); in LowerAAPCS_VASTART()
4253 return DAG.getNode(ISD::TokenFactor, DL, MVT::Other, MemOps); in LowerAAPCS_VASTART()
4296 VAList = DAG.getNode(ISD::ADD, DL, PtrVT, VAList, in LowerVAARG()
4298 VAList = DAG.getNode(ISD::AND, DL, PtrVT, VAList, in LowerVAARG()
4318 SDValue VANext = DAG.getNode(ISD::ADD, DL, PtrVT, VAList, in LowerVAARG()
4330 SDValue NarrowFP = DAG.getNode(ISD::FP_ROUND, DL, VT, WideFP.getValue(0), in LowerVAARG()
4383 DAG.getNode(ISD::ADD, DL, VT, FrameAddr, Offset), in LowerRETURNADDR()
4407 SDValue RevShAmt = DAG.getNode(ISD::SUB, dl, MVT::i64, in LowerShiftRightParts()
4409 SDValue HiBitsForLo = DAG.getNode(ISD::SHL, dl, VT, ShOpHi, RevShAmt); in LowerShiftRightParts()
4417 DAG.getNode(AArch64ISD::CSEL, dl, VT, DAG.getConstant(0, dl, MVT::i64), in LowerShiftRightParts()
4420 SDValue ExtraShAmt = DAG.getNode(ISD::SUB, dl, MVT::i64, ShAmt, in LowerShiftRightParts()
4423 SDValue LoBitsForLo = DAG.getNode(ISD::SRL, dl, VT, ShOpLo, ShAmt); in LowerShiftRightParts()
4425 DAG.getNode(ISD::OR, dl, VT, LoBitsForLo, HiBitsForLo); in LowerShiftRightParts()
4430 SDValue LoForBigShift = DAG.getNode(Opc, dl, VT, ShOpHi, ExtraShAmt); in LowerShiftRightParts()
4431 SDValue Lo = DAG.getNode(AArch64ISD::CSEL, dl, VT, LoForBigShift, in LowerShiftRightParts()
4436 SDValue HiForNormalShift = DAG.getNode(Opc, dl, VT, ShOpHi, ShAmt); in LowerShiftRightParts()
4439 ? DAG.getNode(Opc, dl, VT, ShOpHi, in LowerShiftRightParts()
4442 SDValue Hi = DAG.getNode(AArch64ISD::CSEL, dl, VT, HiForBigShift, in LowerShiftRightParts()
4463 SDValue RevShAmt = DAG.getNode(ISD::SUB, dl, MVT::i64, in LowerShiftLeftParts()
4465 SDValue LoBitsForHi = DAG.getNode(ISD::SRL, dl, VT, ShOpLo, RevShAmt); in LowerShiftLeftParts()
4473 DAG.getNode(AArch64ISD::CSEL, dl, VT, DAG.getConstant(0, dl, MVT::i64), in LowerShiftLeftParts()
4476 SDValue ExtraShAmt = DAG.getNode(ISD::SUB, dl, MVT::i64, ShAmt, in LowerShiftLeftParts()
4478 SDValue HiBitsForHi = DAG.getNode(ISD::SHL, dl, VT, ShOpHi, ShAmt); in LowerShiftLeftParts()
4480 DAG.getNode(ISD::OR, dl, VT, LoBitsForHi, HiBitsForHi); in LowerShiftLeftParts()
4482 SDValue HiForBigShift = DAG.getNode(ISD::SHL, dl, VT, ShOpLo, ExtraShAmt); in LowerShiftLeftParts()
4487 SDValue Hi = DAG.getNode(AArch64ISD::CSEL, dl, VT, HiForBigShift, in LowerShiftLeftParts()
4493 SDValue LoForNormalShift = DAG.getNode(ISD::SHL, dl, VT, ShOpLo, ShAmt); in LowerShiftLeftParts()
4494 SDValue Lo = DAG.getNode(AArch64ISD::CSEL, dl, VT, LoForBigShift, in LowerShiftLeftParts()
4786 if (Result.getNode()) { in LowerAsmOperandForConstraint()
4807 return DAG.getNode(ISD::INSERT_SUBVECTOR, DL, WideTy, DAG.getUNDEF(WideTy), in WidenVector()
4924 DAG.getNode(ISD::CONCAT_VECTORS, dl, DestVT, Src.ShuffleVec, in ReconstructShuffle()
4939 DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, DestVT, Src.ShuffleVec, in ReconstructShuffle()
4945 DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, DestVT, Src.ShuffleVec, in ReconstructShuffle()
4950 DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, DestVT, Src.ShuffleVec, in ReconstructShuffle()
4953 DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, DestVT, Src.ShuffleVec, in ReconstructShuffle()
4957 Src.ShuffleVec = DAG.getNode(AArch64ISD::EXT, dl, DestVT, VEXTSrc1, in ReconstructShuffle()
4972 Src.ShuffleVec = DAG.getNode(ISD::BITCAST, dl, ShuffleVT, Src.ShuffleVec); in ReconstructShuffle()
5022 return DAG.getNode(ISD::BITCAST, dl, VT, Shuffle); in ReconstructShuffle()
5293 V0 = DAG.getNode(ISD::EXTRACT_SUBVECTOR, DL, CastVT, V0, in tryFormConcatFromShuffle()
5297 V1 = DAG.getNode(ISD::EXTRACT_SUBVECTOR, DL, CastVT, V1, in tryFormConcatFromShuffle()
5300 return DAG.getNode(ISD::CONCAT_VECTORS, DL, VT, V0, V1); in tryFormConcatFromShuffle()
5349 return DAG.getNode(AArch64ISD::REV64, dl, VT, OpLHS); in GeneratePerfectShuffle()
5353 return DAG.getNode(AArch64ISD::REV32, dl, VT, OpLHS); in GeneratePerfectShuffle()
5356 return DAG.getNode(AArch64ISD::REV16, dl, VT, OpLHS); in GeneratePerfectShuffle()
5377 return DAG.getNode(Opcode, dl, VT, OpLHS, Lane); in GeneratePerfectShuffle()
5383 return DAG.getNode(AArch64ISD::EXT, dl, VT, OpLHS, OpRHS, in GeneratePerfectShuffle()
5387 return DAG.getNode(AArch64ISD::UZP1, dl, DAG.getVTList(VT, VT), OpLHS, in GeneratePerfectShuffle()
5390 return DAG.getNode(AArch64ISD::UZP2, dl, DAG.getVTList(VT, VT), OpLHS, in GeneratePerfectShuffle()
5393 return DAG.getNode(AArch64ISD::ZIP1, dl, DAG.getVTList(VT, VT), OpLHS, in GeneratePerfectShuffle()
5396 return DAG.getNode(AArch64ISD::ZIP2, dl, DAG.getVTList(VT, VT), OpLHS, in GeneratePerfectShuffle()
5399 return DAG.getNode(AArch64ISD::TRN1, dl, DAG.getVTList(VT, VT), OpLHS, in GeneratePerfectShuffle()
5402 return DAG.getNode(AArch64ISD::TRN2, dl, DAG.getVTList(VT, VT), OpLHS, in GeneratePerfectShuffle()
5432 SDValue V1Cst = DAG.getNode(ISD::BITCAST, DL, IndexVT, V1); in GenerateTBL()
5433 SDValue V2Cst = DAG.getNode(ISD::BITCAST, DL, IndexVT, V2); in GenerateTBL()
5436 if (V2.getNode()->getOpcode() == ISD::UNDEF) { in GenerateTBL()
5438 V1Cst = DAG.getNode(ISD::CONCAT_VECTORS, DL, MVT::v16i8, V1Cst, V1Cst); in GenerateTBL()
5439 Shuffle = DAG.getNode( in GenerateTBL()
5442 DAG.getNode(ISD::BUILD_VECTOR, DL, IndexVT, in GenerateTBL()
5446 V1Cst = DAG.getNode(ISD::CONCAT_VECTORS, DL, MVT::v16i8, V1Cst, V2Cst); in GenerateTBL()
5447 Shuffle = DAG.getNode( in GenerateTBL()
5450 DAG.getNode(ISD::BUILD_VECTOR, DL, IndexVT, in GenerateTBL()
5459 Shuffle = DAG.getNode( in GenerateTBL()
5463 DAG.getNode(ISD::BUILD_VECTOR, DL, IndexVT, in GenerateTBL()
5467 return DAG.getNode(ISD::BITCAST, DL, Op.getValueType(), Shuffle); in GenerateTBL()
5488 ShuffleVectorSDNode *SVN = cast<ShuffleVectorSDNode>(Op.getNode()); in LowerVECTOR_SHUFFLE()
5507 return DAG.getNode(AArch64ISD::DUP, dl, V1.getValueType(), in LowerVECTOR_SHUFFLE()
5513 return DAG.getNode(AArch64ISD::DUP, dl, VT, V1.getOperand(Lane)); in LowerVECTOR_SHUFFLE()
5531 return DAG.getNode(Opcode, dl, VT, V1, DAG.getConstant(Lane, dl, MVT::i64)); in LowerVECTOR_SHUFFLE()
5535 return DAG.getNode(AArch64ISD::REV64, dl, V1.getValueType(), V1, V2); in LowerVECTOR_SHUFFLE()
5537 return DAG.getNode(AArch64ISD::REV32, dl, V1.getValueType(), V1, V2); in LowerVECTOR_SHUFFLE()
5539 return DAG.getNode(AArch64ISD::REV16, dl, V1.getValueType(), V1, V2); in LowerVECTOR_SHUFFLE()
5547 return DAG.getNode(AArch64ISD::EXT, dl, V1.getValueType(), V1, V2, in LowerVECTOR_SHUFFLE()
5552 return DAG.getNode(AArch64ISD::EXT, dl, V1.getValueType(), V1, V1, in LowerVECTOR_SHUFFLE()
5559 return DAG.getNode(Opc, dl, V1.getValueType(), V1, V2); in LowerVECTOR_SHUFFLE()
5563 return DAG.getNode(Opc, dl, V1.getValueType(), V1, V2); in LowerVECTOR_SHUFFLE()
5567 return DAG.getNode(Opc, dl, V1.getValueType(), V1, V2); in LowerVECTOR_SHUFFLE()
5572 return DAG.getNode(Opc, dl, V1.getValueType(), V1, V1); in LowerVECTOR_SHUFFLE()
5576 return DAG.getNode(Opc, dl, V1.getValueType(), V1, V1); in LowerVECTOR_SHUFFLE()
5580 return DAG.getNode(Opc, dl, V1.getValueType(), V1, V1); in LowerVECTOR_SHUFFLE()
5584 if (Concat.getNode()) in LowerVECTOR_SHUFFLE()
5607 return DAG.getNode( in LowerVECTOR_SHUFFLE()
5609 DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, ScalarVT, SrcVec, SrcLaneV), in LowerVECTOR_SHUFFLE()
5663 dyn_cast<BuildVectorSDNode>(Op.getOperand(1).getNode()); in LowerVectorAND()
5689 SDValue Mov = DAG.getNode(AArch64ISD::BICi, dl, MovTy, LHS, in LowerVectorAND()
5692 return DAG.getNode(AArch64ISD::NVCAST, dl, VT, Mov); in LowerVectorAND()
5698 SDValue Mov = DAG.getNode(AArch64ISD::BICi, dl, MovTy, LHS, in LowerVectorAND()
5701 return DAG.getNode(AArch64ISD::NVCAST, dl, VT, Mov); in LowerVectorAND()
5707 SDValue Mov = DAG.getNode(AArch64ISD::BICi, dl, MovTy, LHS, in LowerVectorAND()
5710 return DAG.getNode(AArch64ISD::NVCAST, dl, VT, Mov); in LowerVectorAND()
5716 SDValue Mov = DAG.getNode(AArch64ISD::BICi, dl, MovTy, LHS, in LowerVectorAND()
5719 return DAG.getNode(AArch64ISD::NVCAST, dl, VT, Mov); in LowerVectorAND()
5725 SDValue Mov = DAG.getNode(AArch64ISD::BICi, dl, MovTy, LHS, in LowerVectorAND()
5728 return DAG.getNode(AArch64ISD::NVCAST, dl, VT, Mov); in LowerVectorAND()
5734 SDValue Mov = DAG.getNode(AArch64ISD::BICi, dl, MovTy, LHS, in LowerVectorAND()
5737 return DAG.getNode(AArch64ISD::NVCAST, dl, VT, Mov); in LowerVectorAND()
5839 DAG.getNode(ISD::INTRINSIC_WO_CHAIN, DL, VT, in tryLowerToSLI()
5856 SDValue Res = tryLowerToSLI(Op.getNode(), DAG); in LowerVectorOR()
5857 if (Res.getNode()) in LowerVectorOR()
5862 dyn_cast<BuildVectorSDNode>(Op.getOperand(0).getNode()); in LowerVectorOR()
5870 BVN = dyn_cast<BuildVectorSDNode>(Op.getOperand(1).getNode()); in LowerVectorOR()
5890 SDValue Mov = DAG.getNode(AArch64ISD::ORRi, dl, MovTy, LHS, in LowerVectorOR()
5893 return DAG.getNode(AArch64ISD::NVCAST, dl, VT, Mov); in LowerVectorOR()
5899 SDValue Mov = DAG.getNode(AArch64ISD::ORRi, dl, MovTy, LHS, in LowerVectorOR()
5902 return DAG.getNode(AArch64ISD::NVCAST, dl, VT, Mov); in LowerVectorOR()
5908 SDValue Mov = DAG.getNode(AArch64ISD::ORRi, dl, MovTy, LHS, in LowerVectorOR()
5911 return DAG.getNode(AArch64ISD::NVCAST, dl, VT, Mov); in LowerVectorOR()
5917 SDValue Mov = DAG.getNode(AArch64ISD::ORRi, dl, MovTy, LHS, in LowerVectorOR()
5920 return DAG.getNode(AArch64ISD::NVCAST, dl, VT, Mov); in LowerVectorOR()
5926 SDValue Mov = DAG.getNode(AArch64ISD::ORRi, dl, MovTy, LHS, in LowerVectorOR()
5929 return DAG.getNode(AArch64ISD::NVCAST, dl, VT, Mov); in LowerVectorOR()
5935 SDValue Mov = DAG.getNode(AArch64ISD::ORRi, dl, MovTy, LHS, in LowerVectorOR()
5938 return DAG.getNode(AArch64ISD::NVCAST, dl, VT, Mov); in LowerVectorOR()
5975 return DAG.getNode(ISD::BUILD_VECTOR, dl, VT, Ops); in NormalizeBuildVector()
5983 BuildVectorSDNode *BVN = cast<BuildVectorSDNode>(Op.getNode()); in LowerBUILD_VECTOR()
6008 SDValue Mov = DAG.getNode(AArch64ISD::MOVIedit, dl, MVT::v2i64, in LowerBUILD_VECTOR()
6010 return DAG.getNode(AArch64ISD::NVCAST, dl, VT, Mov); in LowerBUILD_VECTOR()
6014 SDValue Mov = DAG.getNode(AArch64ISD::MOVIedit, dl, MVT::f64, in LowerBUILD_VECTOR()
6016 return DAG.getNode(AArch64ISD::NVCAST, dl, VT, Mov); in LowerBUILD_VECTOR()
6022 SDValue Mov = DAG.getNode(AArch64ISD::MOVIshift, dl, MovTy, in LowerBUILD_VECTOR()
6025 return DAG.getNode(AArch64ISD::NVCAST, dl, VT, Mov); in LowerBUILD_VECTOR()
6031 SDValue Mov = DAG.getNode(AArch64ISD::MOVIshift, dl, MovTy, in LowerBUILD_VECTOR()
6034 return DAG.getNode(AArch64ISD::NVCAST, dl, VT, Mov); in LowerBUILD_VECTOR()
6040 SDValue Mov = DAG.getNode(AArch64ISD::MOVIshift, dl, MovTy, in LowerBUILD_VECTOR()
6043 return DAG.getNode(AArch64ISD::NVCAST, dl, VT, Mov); in LowerBUILD_VECTOR()
6049 SDValue Mov = DAG.getNode(AArch64ISD::MOVIshift, dl, MovTy, in LowerBUILD_VECTOR()
6052 return DAG.getNode(AArch64ISD::NVCAST, dl, VT, Mov); in LowerBUILD_VECTOR()
6058 SDValue Mov = DAG.getNode(AArch64ISD::MOVIshift, dl, MovTy, in LowerBUILD_VECTOR()
6061 return DAG.getNode(AArch64ISD::NVCAST, dl, VT, Mov); in LowerBUILD_VECTOR()
6067 SDValue Mov = DAG.getNode(AArch64ISD::MOVIshift, dl, MovTy, in LowerBUILD_VECTOR()
6070 return DAG.getNode(AArch64ISD::NVCAST, dl, VT, Mov); in LowerBUILD_VECTOR()
6076 SDValue Mov = DAG.getNode(AArch64ISD::MOVImsl, dl, MovTy, in LowerBUILD_VECTOR()
6079 return DAG.getNode(AArch64ISD::NVCAST, dl, VT, Mov); in LowerBUILD_VECTOR()
6085 SDValue Mov = DAG.getNode(AArch64ISD::MOVImsl, dl, MovTy, in LowerBUILD_VECTOR()
6088 return DAG.getNode(AArch64ISD::NVCAST, dl, VT, Mov); in LowerBUILD_VECTOR()
6094 SDValue Mov = DAG.getNode(AArch64ISD::MOVI, dl, MovTy, in LowerBUILD_VECTOR()
6096 return DAG.getNode(AArch64ISD::NVCAST, dl, VT, Mov); in LowerBUILD_VECTOR()
6103 SDValue Mov = DAG.getNode(AArch64ISD::FMOV, dl, MovTy, in LowerBUILD_VECTOR()
6105 return DAG.getNode(AArch64ISD::NVCAST, dl, VT, Mov); in LowerBUILD_VECTOR()
6111 SDValue Mov = DAG.getNode(AArch64ISD::FMOV, dl, MVT::v2f64, in LowerBUILD_VECTOR()
6113 return DAG.getNode(AArch64ISD::NVCAST, dl, VT, Mov); in LowerBUILD_VECTOR()
6121 SDValue Mov = DAG.getNode(AArch64ISD::MVNIshift, dl, MovTy, in LowerBUILD_VECTOR()
6124 return DAG.getNode(AArch64ISD::NVCAST, dl, VT, Mov); in LowerBUILD_VECTOR()
6130 SDValue Mov = DAG.getNode(AArch64ISD::MVNIshift, dl, MovTy, in LowerBUILD_VECTOR()
6133 return DAG.getNode(AArch64ISD::NVCAST, dl, VT, Mov); in LowerBUILD_VECTOR()
6139 SDValue Mov = DAG.getNode(AArch64ISD::MVNIshift, dl, MovTy, in LowerBUILD_VECTOR()
6142 return DAG.getNode(AArch64ISD::NVCAST, dl, VT, Mov); in LowerBUILD_VECTOR()
6148 SDValue Mov = DAG.getNode(AArch64ISD::MVNIshift, dl, MovTy, in LowerBUILD_VECTOR()
6151 return DAG.getNode(AArch64ISD::NVCAST, dl, VT, Mov); in LowerBUILD_VECTOR()
6157 SDValue Mov = DAG.getNode(AArch64ISD::MVNIshift, dl, MovTy, in LowerBUILD_VECTOR()
6160 return DAG.getNode(AArch64ISD::NVCAST, dl, VT, Mov); in LowerBUILD_VECTOR()
6166 SDValue Mov = DAG.getNode(AArch64ISD::MVNIshift, dl, MovTy, in LowerBUILD_VECTOR()
6169 return DAG.getNode(AArch64ISD::NVCAST, dl, VT, Mov); in LowerBUILD_VECTOR()
6175 SDValue Mov = DAG.getNode(AArch64ISD::MVNImsl, dl, MovTy, in LowerBUILD_VECTOR()
6178 return DAG.getNode(AArch64ISD::NVCAST, dl, VT, Mov); in LowerBUILD_VECTOR()
6184 SDValue Mov = DAG.getNode(AArch64ISD::MVNImsl, dl, MovTy, in LowerBUILD_VECTOR()
6187 return DAG.getNode(AArch64ISD::NVCAST, dl, VT, Mov); in LowerBUILD_VECTOR()
6229 if (!ConstantValue.getNode()) in LowerBUILD_VECTOR()
6235 if (!Value.getNode()) in LowerBUILD_VECTOR()
6241 if (!Value.getNode()) in LowerBUILD_VECTOR()
6245 return DAG.getNode(ISD::SCALAR_TO_VECTOR, dl, VT, Value); in LowerBUILD_VECTOR()
6253 return DAG.getNode(AArch64ISD::DUP, dl, VT, Value); in LowerBUILD_VECTOR()
6264 return DAG.getNode(Opcode, dl, VT, Value, Lane); in LowerBUILD_VECTOR()
6274 Ops.push_back(DAG.getNode(ISD::BITCAST, dl, NewType, Op.getOperand(i))); in LowerBUILD_VECTOR()
6276 SDValue Val = DAG.getNode(ISD::BUILD_VECTOR, dl, VecVT, Ops); in LowerBUILD_VECTOR()
6278 if (Val.getNode()) in LowerBUILD_VECTOR()
6279 return DAG.getNode(ISD::BITCAST, dl, VT, Val); in LowerBUILD_VECTOR()
6288 SDValue Val = DAG.getNode(AArch64ISD::DUP, dl, VT, ConstantValue); in LowerBUILD_VECTOR()
6296 Val = DAG.getNode(ISD::INSERT_VECTOR_ELT, dl, VT, Val, V, LaneIdx); in LowerBUILD_VECTOR()
6345 Vec = DAG.getNode(ISD::INSERT_VECTOR_ELT, dl, VT, Vec, V, LaneIdx); in LowerBUILD_VECTOR()
6381 SDValue Node = DAG.getNode(ISD::INSERT_VECTOR_ELT, DL, WideTy, WideVec, in LowerINSERT_VECTOR_ELT()
6420 return DAG.getNode(ISD::EXTRACT_VECTOR_ELT, DL, ExtrTy, WideVec, in LowerEXTRACT_VECTOR_ELT()
6497 BuildVectorSDNode *BVN = dyn_cast<BuildVectorSDNode>(Op.getNode()); in getVShiftImm()
6548 return DAG.getNode(AArch64ISD::VSHL, DL, VT, Op.getOperand(0), in LowerVectorSRA_SRL_SHL()
6550 return DAG.getNode(ISD::INTRINSIC_WO_CHAIN, DL, VT, in LowerVectorSRA_SRL_SHL()
6560 return DAG.getNode(Opc, DL, VT, Op.getOperand(0), in LowerVectorSRA_SRL_SHL()
6570 SDValue NegShift = DAG.getNode(AArch64ISD::NEG, DL, VT, Op.getOperand(1)); in LowerVectorSRA_SRL_SHL()
6572 DAG.getNode(ISD::INTRINSIC_WO_CHAIN, DL, VT, in LowerVectorSRA_SRL_SHL()
6588 BuildVectorSDNode *BVN = dyn_cast<BuildVectorSDNode>(RHS.getNode()); in EmitVectorComparison()
6601 Fcmeq = DAG.getNode(AArch64ISD::FCMEQz, dl, VT, LHS); in EmitVectorComparison()
6603 Fcmeq = DAG.getNode(AArch64ISD::FCMEQ, dl, VT, LHS, RHS); in EmitVectorComparison()
6604 return DAG.getNode(AArch64ISD::NOT, dl, VT, Fcmeq); in EmitVectorComparison()
6608 return DAG.getNode(AArch64ISD::FCMEQz, dl, VT, LHS); in EmitVectorComparison()
6609 return DAG.getNode(AArch64ISD::FCMEQ, dl, VT, LHS, RHS); in EmitVectorComparison()
6612 return DAG.getNode(AArch64ISD::FCMGEz, dl, VT, LHS); in EmitVectorComparison()
6613 return DAG.getNode(AArch64ISD::FCMGE, dl, VT, LHS, RHS); in EmitVectorComparison()
6616 return DAG.getNode(AArch64ISD::FCMGTz, dl, VT, LHS); in EmitVectorComparison()
6617 return DAG.getNode(AArch64ISD::FCMGT, dl, VT, LHS, RHS); in EmitVectorComparison()
6620 return DAG.getNode(AArch64ISD::FCMLEz, dl, VT, LHS); in EmitVectorComparison()
6621 return DAG.getNode(AArch64ISD::FCMGE, dl, VT, RHS, LHS); in EmitVectorComparison()
6629 return DAG.getNode(AArch64ISD::FCMLTz, dl, VT, LHS); in EmitVectorComparison()
6630 return DAG.getNode(AArch64ISD::FCMGT, dl, VT, RHS, LHS); in EmitVectorComparison()
6640 Cmeq = DAG.getNode(AArch64ISD::CMEQz, dl, VT, LHS); in EmitVectorComparison()
6642 Cmeq = DAG.getNode(AArch64ISD::CMEQ, dl, VT, LHS, RHS); in EmitVectorComparison()
6643 return DAG.getNode(AArch64ISD::NOT, dl, VT, Cmeq); in EmitVectorComparison()
6647 return DAG.getNode(AArch64ISD::CMEQz, dl, VT, LHS); in EmitVectorComparison()
6648 return DAG.getNode(AArch64ISD::CMEQ, dl, VT, LHS, RHS); in EmitVectorComparison()
6651 return DAG.getNode(AArch64ISD::CMGEz, dl, VT, LHS); in EmitVectorComparison()
6652 return DAG.getNode(AArch64ISD::CMGE, dl, VT, LHS, RHS); in EmitVectorComparison()
6655 return DAG.getNode(AArch64ISD::CMGTz, dl, VT, LHS); in EmitVectorComparison()
6656 return DAG.getNode(AArch64ISD::CMGT, dl, VT, LHS, RHS); in EmitVectorComparison()
6659 return DAG.getNode(AArch64ISD::CMLEz, dl, VT, LHS); in EmitVectorComparison()
6660 return DAG.getNode(AArch64ISD::CMGE, dl, VT, RHS, LHS); in EmitVectorComparison()
6662 return DAG.getNode(AArch64ISD::CMHS, dl, VT, RHS, LHS); in EmitVectorComparison()
6664 return DAG.getNode(AArch64ISD::CMHI, dl, VT, RHS, LHS); in EmitVectorComparison()
6667 return DAG.getNode(AArch64ISD::CMLTz, dl, VT, LHS); in EmitVectorComparison()
6668 return DAG.getNode(AArch64ISD::CMGT, dl, VT, RHS, LHS); in EmitVectorComparison()
6670 return DAG.getNode(AArch64ISD::CMHI, dl, VT, LHS, RHS); in EmitVectorComparison()
6672 return DAG.getNode(AArch64ISD::CMHS, dl, VT, LHS, RHS); in EmitVectorComparison()
6707 if (!Cmp.getNode()) in LowerVSETCC()
6713 if (!Cmp2.getNode()) in LowerVSETCC()
6716 Cmp = DAG.getNode(ISD::OR, dl, CmpVT, Cmp, Cmp2); in LowerVSETCC()
7352 SDValue Neg = DAG.getNode(ISD::SUB, DL, VT, DAG.getConstant(0, DL, VT), in performIntegerAbsCombine()
7356 DAG.getNode(AArch64ISD::SUBS, DL, DAG.getVTList(VT, MVT::i32), in performIntegerAbsCombine()
7358 return DAG.getNode(AArch64ISD::CSEL, DL, VT, N0.getOperand(0), Neg, in performIntegerAbsCombine()
7360 SDValue(Cmp.getNode(), 1)); in performIntegerAbsCombine()
7394 SDValue Add = DAG.getNode(ISD::ADD, DL, VT, N0, Pow2MinusOne); in BuildSDIVPow2()
7395 SDValue CSel = DAG.getNode(AArch64ISD::CSEL, DL, VT, Add, N0, CCVal, Cmp); in BuildSDIVPow2()
7398 Created->push_back(Cmp.getNode()); in BuildSDIVPow2()
7399 Created->push_back(Add.getNode()); in BuildSDIVPow2()
7400 Created->push_back(CSel.getNode()); in BuildSDIVPow2()
7405 DAG.getNode(ISD::SRA, DL, VT, CSel, DAG.getConstant(Lg2, DL, MVT::i64)); in BuildSDIVPow2()
7413 Created->push_back(SRA.getNode()); in BuildSDIVPow2()
7414 return DAG.getNode(ISD::SUB, DL, VT, DAG.getConstant(0, DL, VT), SRA); in BuildSDIVPow2()
7437 DAG.getNode(ISD::SHL, DL, VT, N->getOperand(0), in performMulCombine()
7439 return DAG.getNode(ISD::ADD, DL, VT, ShiftedVal, in performMulCombine()
7446 DAG.getNode(ISD::SHL, DL, VT, N->getOperand(0), in performMulCombine()
7448 return DAG.getNode(ISD::SUB, DL, VT, ShiftedVal, in performMulCombine()
7456 DAG.getNode(ISD::SHL, DL, VT, N->getOperand(0), in performMulCombine()
7458 return DAG.getNode(ISD::SUB, DL, VT, N->getOperand(0), in performMulCombine()
7465 DAG.getNode(ISD::SHL, DL, VT, N->getOperand(0), in performMulCombine()
7468 DAG.getNode(ISD::ADD, DL, VT, ShiftedVal, N->getOperand(0)); in performMulCombine()
7469 return DAG.getNode(ISD::SUB, DL, VT, DAG.getConstant(0, DL, VT), Add); in performMulCombine()
7510 SDValue SourceConst = DAG.getNode(N->getOpcode(), DL, VT, SDValue(BV, 0)); in performVectorCompareAndMaskUnaryOpCombine()
7512 SDValue MaskConst = DAG.getNode(ISD::BITCAST, DL, IntVT, SourceConst); in performVectorCompareAndMaskUnaryOpCombine()
7513 SDValue NewAnd = DAG.getNode(ISD::AND, DL, IntVT, in performVectorCompareAndMaskUnaryOpCombine()
7515 SDValue Res = DAG.getNode(ISD::BITCAST, DL, VT, NewAnd); in performVectorCompareAndMaskUnaryOpCombine()
7541 if (Subtarget->hasNEON() && ISD::isNormalLoad(N0.getNode()) && N0.hasOneUse() && in performIntToFpCombine()
7556 return DAG.getNode(Opcode, SDLoc(N), VT, Load); in performIntToFpCombine()
7616 DAG.getNode(ISD::INTRINSIC_WO_CHAIN, DL, ResTy, in performFpToIntCombine()
7621 FixConv = DAG.getNode(ISD::TRUNCATE, DL, N->getValueType(0), FixConv); in performFpToIntCombine()
7680 ConvInput = DAG.getNode(IsSigned ? ISD::SIGN_EXTEND : ISD::ZERO_EXTEND, DL, in performFDivCombine()
7685 return DAG.getNode(ISD::INTRINSIC_WO_CHAIN, DL, Op.getValueType(), in performFDivCombine()
7750 return DAG.getNode(AArch64ISD::EXTR, DL, VT, LHS, RHS, in tryCombineToEXTR()
7794 return DAG.getNode(AArch64ISD::BSL, DL, VT, SDValue(BVN0, 0), in tryCombineToBSL()
7813 if (Res.getNode()) in performORCombine()
7817 if (Res.getNode()) in performORCombine()
7880 return DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, VT, Source, HalfIdx); in performBitcastCombine()
7921 return DAG.getNode(ISD::TRUNCATE, dl, VT, in performConcatVectorsCombine()
7924 DAG.getNode(ISD::BITCAST, dl, MidVT, N00), in performConcatVectorsCombine()
7925 DAG.getNode(ISD::BITCAST, dl, MidVT, N10), Mask)); in performConcatVectorsCombine()
7939 return DAG.getNode(AArch64ISD::DUPLANE64, dl, VT, WidenVector(N0, DAG), in performConcatVectorsCombine()
7964 return DAG.getNode(ISD::BITCAST, dl, VT, in performConcatVectorsCombine()
7965 DAG.getNode(ISD::CONCAT_VECTORS, dl, ConcatTy, in performConcatVectorsCombine()
7966 DAG.getNode(ISD::BITCAST, dl, RHSTy, N0), in performConcatVectorsCombine()
8011 DAG.getNode(ISD::INTRINSIC_WO_CHAIN, DL, VecResTy, IID, Vec, Shift); in tryCombineFixedPointConvert()
8012 return DAG.getNode(ISD::EXTRACT_VECTOR_ELT, DL, ResTy, Convert, Lane); in tryCombineFixedPointConvert()
8062 return DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, NarrowTy, in tryExtendDUPToExtractHigh()
8063 DAG.getNode(N->getOpcode(), dl, NewVT, N->ops()), in tryExtendDUPToExtractHigh()
8199 LHS = DAG.getNode(ISD::ADD, dl, VT, RHS, DAG.getConstant(1, dl, VT)); in performSetccAddFolding()
8200 return DAG.getNode(AArch64ISD::CSEL, dl, VT, RHS, LHS, CCVal, Cmp); in performSetccAddFolding()
8241 if (!RHS.getNode()) in performAddSubLongCombine()
8244 RHS = DAG.getNode(ExtType, SDLoc(N), VT, RHS); in performAddSubLongCombine()
8247 if (!LHS.getNode()) in performAddSubLongCombine()
8250 LHS = DAG.getNode(ExtType, SDLoc(N), VT, LHS); in performAddSubLongCombine()
8253 return DAG.getNode(N->getOpcode(), SDLoc(N), VT, LHS, RHS); in performAddSubLongCombine()
8280 if (!RHS.getNode()) in tryCombineLongOpWithDup()
8284 if (!LHS.getNode()) in tryCombineLongOpWithDup()
8288 return DAG.getNode(ISD::INTRINSIC_WO_CHAIN, SDLoc(N), N->getValueType(0), in tryCombineLongOpWithDup()
8341 return DAG.getNode(Opcode, dl, N->getValueType(0), N->getOperand(1), in tryCombineShiftImm()
8345 return DAG.getNode(Opcode, dl, N->getValueType(0), N->getOperand(1), in tryCombineShiftImm()
8364 return DAG.getNode(ISD::INTRINSIC_WO_CHAIN, SDLoc(N), MVT::i32, in tryCombineCRC32()
8371 return DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, N->getValueType(0), in combineAcrossLanesIntrinsic()
8372 DAG.getNode(Opc, dl, in combineAcrossLanesIntrinsic()
8402 return DAG.getNode(ISD::FMAXNAN, SDLoc(N), N->getValueType(0), in performIntrinsicCombine()
8405 return DAG.getNode(ISD::FMINNAN, SDLoc(N), N->getValueType(0), in performIntrinsicCombine()
8408 return DAG.getNode(ISD::FMAXNUM, SDLoc(N), N->getValueType(0), in performIntrinsicCombine()
8411 return DAG.getNode(ISD::FMINNUM, SDLoc(N), N->getValueType(0), in performIntrinsicCombine()
8443 SDNode *ABDNode = N->getOperand(0).getNode(); in performExtendCombine()
8448 if (!NewABD.getNode()) in performExtendCombine()
8451 return DAG.getNode(ISD::ZERO_EXTEND, SDLoc(N), N->getValueType(0), in performExtendCombine()
8507 Src = DAG.getNode(N->getOpcode(), DL, SrcVT, Src); in performExtendCombine()
8520 Lo = DAG.getNode(ISD::EXTRACT_SUBVECTOR, DL, InNVT, Src, in performExtendCombine()
8522 Hi = DAG.getNode(ISD::EXTRACT_SUBVECTOR, DL, InNVT, Src, in performExtendCombine()
8524 Lo = DAG.getNode(N->getOpcode(), DL, LoVT, Lo); in performExtendCombine()
8525 Hi = DAG.getNode(N->getOpcode(), DL, HiVT, Hi); in performExtendCombine()
8529 return DAG.getNode(ISD::CONCAT_VECTORS, DL, ResVT, Lo, Hi); in performExtendCombine()
8582 SDValue OffsetPtr = DAG.getNode(ISD::ADD, DL, MVT::i64, BasePtr, in replaceSplatVectorStore()
8643 SDValue SubVector0 = DAG.getNode(ISD::EXTRACT_SUBVECTOR, DL, HalfVT, StVal, in split16BStores()
8645 SDValue SubVector1 = DAG.getNode(ISD::EXTRACT_SUBVECTOR, DL, HalfVT, StVal, in split16BStores()
8651 SDValue OffsetPtr = DAG.getNode(ISD::ADD, DL, MVT::i64, BasePtr, in split16BStores()
8670 SDNode *LD = N->getOperand(LoadIdx).getNode(); in performPostLD1Combine()
8694 for (SDNode::use_iterator UI = Addr.getNode()->use_begin(), UE = in performPostLD1Combine()
8695 Addr.getNode()->use_end(); UI != UE; ++UI) { in performPostLD1Combine()
8707 if (User->isPredecessorOf(Vector.getNode())) in performPostLD1Combine()
8712 if (ConstantSDNode *CInc = dyn_cast<ConstantSDNode>(Inc.getNode())) { in performPostLD1Combine()
8724 if (LoadSDN->isPredecessorOf(Vector.getNode())) in performPostLD1Combine()
8746 NewResults.push_back(SDValue(UpdN.getNode(), 2)); // Chain in performPostLD1Combine()
8748 DCI.CombineTo(N, SDValue(UpdN.getNode(), 0)); // Dup/Inserted Result in performPostLD1Combine()
8749 DCI.CombineTo(User, SDValue(UpdN.getNode(), 1)); // Write back register in performPostLD1Combine()
8778 if (Split.getNode()) in performSTORECombine()
8890 ? DAG.getNode(ISD::INTRINSIC_WO_CHAIN, DL, N->getValueType(0), in tryMatchAcrossLaneShuffleForReduction()
8892 : DAG.getNode( in tryMatchAcrossLaneShuffleForReduction()
8894 DAG.getNode(Opcode, DL, PreOp.getSimpleValueType(), PreOp), in tryMatchAcrossLaneShuffleForReduction()
9061 for (SDNode::use_iterator UI = Addr.getNode()->use_begin(), in performNEONPostLDSTCombine()
9062 UE = Addr.getNode()->use_end(); UI != UE; ++UI) { in performNEONPostLDSTCombine()
9134 if (ConstantSDNode *CInc = dyn_cast<ConstantSDNode>(Inc.getNode())) { in performNEONPostLDSTCombine()
9170 NewResults.push_back(SDValue(UpdN.getNode(), i)); in performNEONPostLDSTCombine()
9172 NewResults.push_back(SDValue(UpdN.getNode(), NumResultVecs + 1)); in performNEONPostLDSTCombine()
9174 DCI.CombineTo(User, SDValue(UpdN.getNode(), NumResultVecs)); in performNEONPostLDSTCombine()
9186 switch(V.getNode()->getOpcode()) { in checkValueWidth()
9190 LoadSDNode *LoadNode = cast<LoadSDNode>(V.getNode()); in checkValueWidth()
9199 VTSDNode *TypeNode = cast<VTSDNode>(V.getNode()->getOperand(1)); in checkValueWidth()
9208 VTSDNode *TypeNode = cast<VTSDNode>(V.getNode()->getOperand(1)); in checkValueWidth()
9218 if (std::abs(cast<ConstantSDNode>(V.getNode())->getSExtValue()) < in checkValueWidth()
9372 SDNode *SubsNode = N->getOperand(CmpIndex).getNode(); in performCONDCombine()
9381 SDNode *AndNode = SubsNode->getOperand(0).getNode(); in performCONDCombine()
9405 SDValue AddInputValue1 = AddValue.getNode()->getOperand(0); in performCONDCombine()
9406 SDValue AddInputValue2 = AddValue.getNode()->getOperand(1); in performCONDCombine()
9412 if (!isa<ConstantSDNode>(AddInputValue2.getNode()) || in performCONDCombine()
9413 !isa<ConstantSDNode>(SubsInputValue.getNode())) in performCONDCombine()
9424 cast<ConstantSDNode>(AddInputValue2.getNode())->getSExtValue(), in performCONDCombine()
9425 cast<ConstantSDNode>(SubsInputValue.getNode())->getSExtValue())) in performCONDCombine()
9434 SDValue NewValue = DAG.getNode(CondOpcode, SDLoc(SubsNode), VTs, Ops); in performCONDCombine()
9435 DAG.ReplaceAllUsesWith(SubsNode, NewValue.getNode()); in performCONDCombine()
9445 if (NV.getNode()) in performBRCONDCombine()
9446 N = NV.getNode(); in performBRCONDCombine()
9487 BR = DAG.getNode(AArch64ISD::CBZ, SDLoc(N), MVT::Other, Chain, LHS, Dest); in performBRCONDCombine()
9489 BR = DAG.getNode(AArch64ISD::CBNZ, SDLoc(N), MVT::Other, Chain, LHS, Dest); in performBRCONDCombine()
9523 return DAG.getNode(ISD::VSELECT, SDLoc(N), ResVT, SetCC, in performVSelectCombine()
9577 DAG.getNode(ISD::SCALAR_TO_VECTOR, DL, SrcVT, N0.getOperand(0)); in performSelectCombine()
9579 DAG.getNode(ISD::SCALAR_TO_VECTOR, DL, SrcVT, N0.getOperand(1)); in performSelectCombine()
9580 SDValue SetCC = DAG.getNode(ISD::SETCC, DL, CCVT, LHS, RHS, N0.getOperand(2)); in performSelectCombine()
9585 Mask = DAG.getNode(ISD::BITCAST, DL, in performSelectCombine()
9634 if (!RV.getNode()) in PerformDAGCombine()
9776 if (!getIndexedAddressParts(Ptr.getNode(), Base, Offset, AM, IsInc, DAG)) in getPreIndexedAddressParts()
9820 Op = DAG.getNode(ISD::BITCAST, DL, MVT::i32, Op); in ReplaceBITCASTResults()
9821 Results.push_back(DAG.getNode(ISD::TRUNCATE, DL, MVT::i16, Op)); in ReplaceBITCASTResults()
9833 SDValue InterVal = DAG.getNode(InterOp, dl, LoVT, Lo, Hi); in ReplaceReductionResults()
9834 SDValue SplitVal = DAG.getNode(AcrossOp, dl, LoVT, InterVal); in ReplaceReductionResults()