306   OutStreamer->EmitIntValue(RsrcReg, 4);  in EmitProgramInfoR600()
307   OutStreamer->EmitIntValue(S_NUM_GPRS(MaxGPR + 1) |  in EmitProgramInfoR600()
309   OutStreamer->EmitIntValue(R_02880C_DB_SHADER_CONTROL, 4);  in EmitProgramInfoR600()
310   OutStreamer->EmitIntValue(S_02880C_KILL_ENABLE(killPixel), 4);  in EmitProgramInfoR600()
313     OutStreamer->EmitIntValue(R_0288E8_SQ_LDS_ALLOC, 4);  in EmitProgramInfoR600()
314     OutStreamer->EmitIntValue(RoundUpToAlignment(MFI->LDSSize, 4) >> 2, 4);  in EmitProgramInfoR600()
540     OutStreamer->EmitIntValue(R_00B848_COMPUTE_PGM_RSRC1, 4);  in EmitProgramInfoSI()
542     OutStreamer->EmitIntValue(KernelInfo.ComputePGMRSrc1, 4);  in EmitProgramInfoSI()
544     OutStreamer->EmitIntValue(R_00B84C_COMPUTE_PGM_RSRC2, 4);  in EmitProgramInfoSI()
545     OutStreamer->EmitIntValue(KernelInfo.ComputePGMRSrc2, 4);  in EmitProgramInfoSI()
547     OutStreamer->EmitIntValue(R_00B860_COMPUTE_TMPRING_SIZE, 4);  in EmitProgramInfoSI()
548     OutStreamer->EmitIntValue(S_00B860_WAVESIZE(KernelInfo.ScratchBlocks), 4);  in EmitProgramInfoSI()
553     OutStreamer->EmitIntValue(RsrcReg, 4);  in EmitProgramInfoSI()
554     OutStreamer->EmitIntValue(S_00B028_VGPRS(KernelInfo.VGPRBlocks) |  in EmitProgramInfoSI()
557       OutStreamer->EmitIntValue(R_0286E8_SPI_TMPRING_SIZE, 4);  in EmitProgramInfoSI()
558       OutStreamer->EmitIntValue(S_0286E8_WAVESIZE(KernelInfo.ScratchBlocks), 4);  in EmitProgramInfoSI()
563     OutStreamer->EmitIntValue(R_00B02C_SPI_SHADER_PGM_RSRC2_PS, 4);  in EmitProgramInfoSI()
564     OutStreamer->EmitIntValue(S_00B02C_EXTRA_LDS_SIZE(KernelInfo.LDSBlocks), 4);  in EmitProgramInfoSI()
565     OutStreamer->EmitIntValue(R_0286CC_SPI_PS_INPUT_ENA, 4);  in EmitProgramInfoSI()
566     OutStreamer->EmitIntValue(MFI->PSInputAddr, 4);  in EmitProgramInfoSI()