Lines Matching refs:DebugLoc
71 DebugLoc DL,
77 DebugLoc DL,
83 DebugLoc DL,
88 DebugLoc DL,
93 DebugLoc DL, unsigned DReg, unsigned Lane,
98 DebugLoc DL);
432 DebugLoc DL, in createDupLane()
451 DebugLoc DL, in createExtractSubreg()
468 DebugLoc DL, in createRegSequence()
487 DebugLoc DL, in createVExt()
503 DebugLoc DL, unsigned DReg, unsigned Lane, in createInsertSubreg()
520 DebugLoc DL) { in createImplicitDef()
535 DebugLoc DL = MI->getDebugLoc(); in optimizeAllLanesPattern()