Lines Matching refs:CondCodes
136 ARMCC::CondCodes Pred, unsigned PredReg);
139 bool BaseKill, unsigned Opcode, ARMCC::CondCodes Pred, unsigned PredReg,
143 bool BaseKill, unsigned Opcode, ARMCC::CondCodes Pred, unsigned PredReg,
444 ARMCC::CondCodes Pred, unsigned PredReg) { in UpdateBaseRegUses()
579 bool BaseKill, unsigned Opcode, ARMCC::CondCodes Pred, unsigned PredReg, in CreateLoadStoreMulti()
775 bool BaseKill, unsigned Opcode, ARMCC::CondCodes Pred, unsigned PredReg, in CreateLoadStoreDouble()
843 ARMCC::CondCodes Pred = getInstrPredicate(First, PredReg); in MergeOpsUpdate()
1087 ARMCC::CondCodes Pred, unsigned PredReg) { in isIncrementOrDecrement()
1117 ARMCC::CondCodes Pred, unsigned PredReg, int &Offset) { in findIncDecBefore()
1137 ARMCC::CondCodes Pred, unsigned PredReg, int &Offset) { in findIncDecAfter()
1172 ARMCC::CondCodes Pred = getInstrPredicate(MI, PredReg); in MergeBaseUpdateLSMultiple()
1294 ARMCC::CondCodes Pred = getInstrPredicate(MI, PredReg); in MergeBaseUpdateLoadStore()
1391 ARMCC::CondCodes Pred = getInstrPredicate(&MI, PredReg); in MergeBaseUpdateLSDouble()
1496 ARMCC::CondCodes Pred, unsigned PredReg, in InsertLDR_STR()
1552 ARMCC::CondCodes Pred = getInstrPredicate(MI, PredReg); in FixInvalidRegPairOp()
1638 ARMCC::CondCodes CurrPred = ARMCC::AL; in LoadStoreMultipleOpti()
1658 ARMCC::CondCodes Pred = getInstrPredicate(MBBI, PredReg); in LoadStoreMultipleOpti()
1914 unsigned &PredReg, ARMCC::CondCodes &Pred,
2013 ARMCC::CondCodes &Pred, in CanFormLdStDWord()
2171 ARMCC::CondCodes Pred = ARMCC::AL; in RescheduleOps()