Lines Matching refs:LD
94 SDNode *SelectBaseOffsetLoad(LoadSDNode *LD, SDLoc dl);
95 SDNode *SelectIndexedLoad(LoadSDNode *LD, SDLoc dl);
96 SDNode *SelectIndexedLoadZeroExtend64(LoadSDNode *LD, unsigned Opcode,
98 SDNode *SelectIndexedLoadSignExtend64(LoadSDNode *LD, unsigned Opcode,
254 SDNode *HexagonDAGToDAGISel::SelectIndexedLoadSignExtend64(LoadSDNode *LD, in SelectIndexedLoadSignExtend64() argument
257 SDValue Chain = LD->getChain(); in SelectIndexedLoadSignExtend64()
258 EVT LoadedVT = LD->getMemoryVT(); in SelectIndexedLoadSignExtend64()
259 SDValue Base = LD->getBasePtr(); in SelectIndexedLoadSignExtend64()
260 SDValue Offset = LD->getOffset(); in SelectIndexedLoadSignExtend64()
272 MemOp[0] = LD->getMemOperand(); in SelectIndexedLoadSignExtend64()
274 const SDValue Froms[] = { SDValue(LD, 0), in SelectIndexedLoadSignExtend64()
275 SDValue(LD, 1), in SelectIndexedLoadSignExtend64()
276 SDValue(LD, 2) }; in SelectIndexedLoadSignExtend64()
294 MemOp[0] = LD->getMemOperand(); in SelectIndexedLoadSignExtend64()
296 const SDValue Froms[] = { SDValue(LD, 0), in SelectIndexedLoadSignExtend64()
297 SDValue(LD, 1), in SelectIndexedLoadSignExtend64()
298 SDValue(LD, 2) }; in SelectIndexedLoadSignExtend64()
307 SDNode *HexagonDAGToDAGISel::SelectIndexedLoadZeroExtend64(LoadSDNode *LD, in SelectIndexedLoadZeroExtend64() argument
310 SDValue Chain = LD->getChain(); in SelectIndexedLoadZeroExtend64()
311 EVT LoadedVT = LD->getMemoryVT(); in SelectIndexedLoadZeroExtend64()
312 SDValue Base = LD->getBasePtr(); in SelectIndexedLoadZeroExtend64()
313 SDValue Offset = LD->getOffset(); in SelectIndexedLoadZeroExtend64()
328 MemOp[0] = LD->getMemOperand(); in SelectIndexedLoadZeroExtend64()
330 const SDValue Froms[] = { SDValue(LD, 0), in SelectIndexedLoadZeroExtend64()
331 SDValue(LD, 1), in SelectIndexedLoadZeroExtend64()
332 SDValue(LD, 2) }; in SelectIndexedLoadZeroExtend64()
355 MemOp[0] = LD->getMemOperand(); in SelectIndexedLoadZeroExtend64()
357 const SDValue Froms[] = { SDValue(LD, 0), in SelectIndexedLoadZeroExtend64()
358 SDValue(LD, 1), in SelectIndexedLoadZeroExtend64()
359 SDValue(LD, 2) }; in SelectIndexedLoadZeroExtend64()
368 SDNode *HexagonDAGToDAGISel::SelectIndexedLoad(LoadSDNode *LD, SDLoc dl) { in SelectIndexedLoad() argument
369 SDValue Chain = LD->getChain(); in SelectIndexedLoad()
370 SDValue Base = LD->getBasePtr(); in SelectIndexedLoad()
371 SDValue Offset = LD->getOffset(); in SelectIndexedLoad()
375 EVT LoadedVT = LD->getMemoryVT(); in SelectIndexedLoad()
380 ISD::LoadExtType ExtType = LD->getExtensionType(); in SelectIndexedLoad()
426 if (LD->getValueType(0) == MVT::i64 && IsZeroExt) in SelectIndexedLoad()
427 return SelectIndexedLoadZeroExtend64(LD, Opcode, dl); in SelectIndexedLoad()
429 if (LD->getValueType(0) == MVT::i64 && ExtType == ISD::SEXTLOAD) in SelectIndexedLoad()
430 return SelectIndexedLoadSignExtend64(LD, Opcode, dl); in SelectIndexedLoad()
435 LD->getValueType(0), in SelectIndexedLoad()
439 MemOp[0] = LD->getMemOperand(); in SelectIndexedLoad()
442 const SDValue Froms[] = { SDValue(LD, 0), in SelectIndexedLoad()
443 SDValue(LD, 2) in SelectIndexedLoad()
450 const SDValue Froms[] = { SDValue(LD, 0), in SelectIndexedLoad()
451 SDValue(LD, 1), in SelectIndexedLoad()
452 SDValue(LD, 2) in SelectIndexedLoad()
465 LD->getValueType(0), in SelectIndexedLoad()
472 MemOp[0] = LD->getMemOperand(); in SelectIndexedLoad()
474 const SDValue Froms[] = { SDValue(LD, 0), in SelectIndexedLoad()
475 SDValue(LD, 1), in SelectIndexedLoad()
476 SDValue(LD, 2) in SelectIndexedLoad()
491 LoadSDNode *LD = cast<LoadSDNode>(N); in SelectLoad() local
492 ISD::MemIndexedMode AM = LD->getAddressingMode(); in SelectLoad()
496 result = SelectIndexedLoad(LD, dl); in SelectLoad()
498 result = SelectCode(LD); in SelectLoad()
637 LoadSDNode *LD = cast<LoadSDNode>(MulOp0.getNode()); in SelectMul() local
638 if (LD->getMemoryVT() != MVT::i32 || in SelectMul()
639 LD->getExtensionType() != ISD::SEXTLOAD || in SelectMul()
640 LD->getAddressingMode() != ISD::UNINDEXED) { in SelectMul()
644 SDValue Chain = LD->getChain(); in SelectMul()
648 LD->getBasePtr(), TargetConst0, in SelectMul()
663 LoadSDNode *LD = cast<LoadSDNode>(MulOp1.getNode()); in SelectMul() local
664 if (LD->getMemoryVT() != MVT::i32 || in SelectMul()
665 LD->getExtensionType() != ISD::SEXTLOAD || in SelectMul()
666 LD->getAddressingMode() != ISD::UNINDEXED) { in SelectMul()
670 SDValue Chain = LD->getChain(); in SelectMul()
674 LD->getBasePtr(), TargetConst0, in SelectMul()