Lines Matching refs:HexagonInstrInfo
100 void HexagonInstrInfo::anchor() {} in anchor()
102 HexagonInstrInfo::HexagonInstrInfo(HexagonSubtarget &ST) in HexagonInstrInfo() function in HexagonInstrInfo
233 unsigned HexagonInstrInfo::isLoadFromStackSlot(const MachineInstr *MI, in isLoadFromStackSlot()
258 unsigned HexagonInstrInfo::isStoreToStackSlot(const MachineInstr *MI, in isStoreToStackSlot()
293 bool HexagonInstrInfo::AnalyzeBranch(MachineBasicBlock &MBB, in AnalyzeBranch()
459 unsigned HexagonInstrInfo::RemoveBranch(MachineBasicBlock &MBB) const { in RemoveBranch()
480 unsigned HexagonInstrInfo::InsertBranch(MachineBasicBlock &MBB, in InsertBranch()
575 bool HexagonInstrInfo::isProfitableToIfCvt(MachineBasicBlock &MBB, in isProfitableToIfCvt()
582 bool HexagonInstrInfo::isProfitableToIfCvt(MachineBasicBlock &TMBB, in isProfitableToIfCvt()
590 bool HexagonInstrInfo::isProfitableToDupForIfCvt(MachineBasicBlock &MBB, in isProfitableToDupForIfCvt()
596 void HexagonInstrInfo::copyPhysReg(MachineBasicBlock &MBB, in copyPhysReg()
704 void HexagonInstrInfo::storeRegToStackSlot(MachineBasicBlock &MBB, in storeRegToStackSlot()
734 void HexagonInstrInfo::loadRegFromStackSlot(MachineBasicBlock &MBB, in loadRegFromStackSlot()
766 bool HexagonInstrInfo::expandPostRAPseudo(MachineBasicBlock::iterator MI) in expandPostRAPseudo()
1007 bool HexagonInstrInfo::ReverseBranchCondition( in ReverseBranchCondition()
1023 void HexagonInstrInfo::insertNoop(MachineBasicBlock &MBB, in insertNoop()
1038 bool HexagonInstrInfo::isPredicated(const MachineInstr *MI) const { in isPredicated()
1044 bool HexagonInstrInfo::PredicateInstruction(MachineInstr *MI, in PredicateInstruction()
1096 bool HexagonInstrInfo::SubsumesPredicate(ArrayRef<MachineOperand> Pred1, in SubsumesPredicate()
1103 bool HexagonInstrInfo::DefinesPredicate(MachineInstr *MI, in DefinesPredicate()
1119 bool HexagonInstrInfo::isPredicable(MachineInstr *MI) const { in isPredicable()
1207 bool HexagonInstrInfo::isSchedulingBoundary(const MachineInstr *MI, in isSchedulingBoundary()
1252 unsigned HexagonInstrInfo::getInlineAsmLength(const char *Str, in getInlineAsmLength()
1279 HexagonInstrInfo::CreateTargetPostRAHazardRecognizer( in CreateTargetPostRAHazardRecognizer()
1289 bool HexagonInstrInfo::analyzeCompare(const MachineInstr *MI, in analyzeCompare()
1374 unsigned HexagonInstrInfo::getInstrLatency(const InstrItineraryData *ItinData, in getInstrLatency()
1380 DFAPacketizer *HexagonInstrInfo::CreateTargetScheduleState( in CreateTargetScheduleState()
1391 bool HexagonInstrInfo::areMemAccessesTriviallyDisjoint(MachineInstr *MIa, in areMemAccessesTriviallyDisjoint()
1432 unsigned HexagonInstrInfo::createVR(MachineFunction* MF, MVT VT) const { in createVR()
1450 bool HexagonInstrInfo::isAbsoluteSet(const MachineInstr* MI) const { in isAbsoluteSet()
1455 bool HexagonInstrInfo::isAccumulator(const MachineInstr *MI) const { in isAccumulator()
1461 bool HexagonInstrInfo::isComplex(const MachineInstr *MI) const { in isComplex()
1464 const HexagonInstrInfo *QII = (const HexagonInstrInfo *) TII; in isComplex()
1483 bool HexagonInstrInfo::isCompoundBranchInstr(const MachineInstr *MI) const { in isCompoundBranchInstr()
1488 bool HexagonInstrInfo::isCondInst(const MachineInstr *MI) const { in isCondInst()
1499 bool HexagonInstrInfo::isConditionalALU32(const MachineInstr* MI) const { in isConditionalALU32()
1559 bool HexagonInstrInfo::isConditionalLoad(const MachineInstr* MI) const { in isConditionalLoad()
1573 bool HexagonInstrInfo::isConditionalStore(const MachineInstr* MI) const { in isConditionalStore()
1627 bool HexagonInstrInfo::isConditionalTransfer(const MachineInstr *MI) const { in isConditionalTransfer()
1650 bool HexagonInstrInfo::isConstExtended(const MachineInstr *MI) const { in isConstExtended()
1697 bool HexagonInstrInfo::isDeallocRet(const MachineInstr *MI) const { in isDeallocRet()
1713 bool HexagonInstrInfo::isDependent(const MachineInstr *ProdMI, in isDependent()
1751 bool HexagonInstrInfo::isDotCurInst(const MachineInstr* MI) const { in isDotCurInst()
1765 bool HexagonInstrInfo::isDotNewInst(const MachineInstr* MI) const { in isDotNewInst()
1775 bool HexagonInstrInfo::isDuplexPair(const MachineInstr *MIa, in isDuplexPair()
1783 bool HexagonInstrInfo::isEarlySourceInstr(const MachineInstr *MI) const { in isEarlySourceInstr()
1798 bool HexagonInstrInfo::isEndLoopN(unsigned Opcode) const { in isEndLoopN()
1804 bool HexagonInstrInfo::isExpr(unsigned OpType) const { in isExpr()
1819 bool HexagonInstrInfo::isExtendable(const MachineInstr *MI) const { in isExtendable()
1841 bool HexagonInstrInfo::isExtended(const MachineInstr *MI) const { in isExtended()
1857 bool HexagonInstrInfo::isFloat(const MachineInstr *MI) const { in isFloat()
1865 bool HexagonInstrInfo::isHVXMemWithAIndirect(const MachineInstr *I, in isHVXMemWithAIndirect()
1875 bool HexagonInstrInfo::isIndirectCall(const MachineInstr *MI) const { in isIndirectCall()
1886 bool HexagonInstrInfo::isIndirectL4Return(const MachineInstr *MI) const { in isIndirectL4Return()
1901 bool HexagonInstrInfo::isJumpR(const MachineInstr *MI) const { in isJumpR()
1920 bool HexagonInstrInfo::isJumpWithinBranchRange(const MachineInstr *MI, in isJumpWithinBranchRange()
1961 bool HexagonInstrInfo::isLateInstrFeedsEarlyInstr(const MachineInstr *LRMI, in isLateInstrFeedsEarlyInstr()
1983 bool HexagonInstrInfo::isLateResultInstr(const MachineInstr *MI) const { in isLateResultInstr()
2023 bool HexagonInstrInfo::isLateSourceInstr(const MachineInstr *MI) const { in isLateSourceInstr()
2033 bool HexagonInstrInfo::isLoopN(const MachineInstr *MI) const { in isLoopN()
2046 bool HexagonInstrInfo::isMemOp(const MachineInstr *MI) const { in isMemOp()
2079 bool HexagonInstrInfo::isNewValue(const MachineInstr* MI) const { in isNewValue()
2085 bool HexagonInstrInfo::isNewValue(unsigned Opcode) const { in isNewValue()
2091 bool HexagonInstrInfo::isNewValueInst(const MachineInstr *MI) const { in isNewValueInst()
2096 bool HexagonInstrInfo::isNewValueJump(const MachineInstr *MI) const { in isNewValueJump()
2101 bool HexagonInstrInfo::isNewValueJump(unsigned Opcode) const { in isNewValueJump()
2106 bool HexagonInstrInfo::isNewValueStore(const MachineInstr *MI) const { in isNewValueStore()
2112 bool HexagonInstrInfo::isNewValueStore(unsigned Opcode) const { in isNewValueStore()
2119 bool HexagonInstrInfo::isOperandExtended(const MachineInstr *MI, in isOperandExtended()
2127 bool HexagonInstrInfo::isPostIncrement(const MachineInstr* MI) const { in isPostIncrement()
2132 bool HexagonInstrInfo::isPredicatedNew(const MachineInstr *MI) const { in isPredicatedNew()
2139 bool HexagonInstrInfo::isPredicatedNew(unsigned Opcode) const { in isPredicatedNew()
2146 bool HexagonInstrInfo::isPredicatedTrue(const MachineInstr *MI) const { in isPredicatedTrue()
2153 bool HexagonInstrInfo::isPredicatedTrue(unsigned Opcode) const { in isPredicatedTrue()
2162 bool HexagonInstrInfo::isPredicated(unsigned Opcode) const { in isPredicated()
2168 bool HexagonInstrInfo::isPredicateLate(unsigned Opcode) const { in isPredicateLate()
2174 bool HexagonInstrInfo::isPredictedTaken(unsigned Opcode) const { in isPredictedTaken()
2182 bool HexagonInstrInfo::isSaveCalleeSavedRegsCall(const MachineInstr *MI) const { in isSaveCalleeSavedRegsCall()
2188 bool HexagonInstrInfo::isSolo(const MachineInstr* MI) const { in isSolo()
2194 bool HexagonInstrInfo::isSpillPredRegOp(const MachineInstr *MI) const { in isSpillPredRegOp()
2206 bool HexagonInstrInfo::isTC1(const MachineInstr *MI) const { in isTC1()
2225 bool HexagonInstrInfo::isTC2(const MachineInstr *MI) const { in isTC2()
2242 bool HexagonInstrInfo::isTC2Early(const MachineInstr *MI) const { in isTC2Early()
2263 bool HexagonInstrInfo::isTC4x(const MachineInstr *MI) const { in isTC4x()
2272 bool HexagonInstrInfo::isV60VectorInstruction(const MachineInstr *MI) const { in isV60VectorInstruction()
2283 bool HexagonInstrInfo::isValidAutoIncImm(const EVT VT, const int Offset) const { in isValidAutoIncImm()
2320 bool HexagonInstrInfo::isValidOffset(unsigned Opcode, int Offset, in isValidOffset()
2479 bool HexagonInstrInfo::isVecAcc(const MachineInstr *MI) const { in isVecAcc()
2484 bool HexagonInstrInfo::isVecALU(const MachineInstr *MI) const { in isVecALU()
2495 bool HexagonInstrInfo::isVecUsableNextPacket(const MachineInstr *ProdMI, in isVecUsableNextPacket()
2511 bool HexagonInstrInfo::canExecuteInBundle(const MachineInstr *First, in canExecuteInBundle()
2532 bool HexagonInstrInfo::hasEHLabel(const MachineBasicBlock *B) const { in hasEHLabel()
2542 bool HexagonInstrInfo::hasNonExtEquivalent(const MachineInstr *MI) const { in hasNonExtEquivalent()
2578 bool HexagonInstrInfo::hasPseudoInstrPair(const MachineInstr *MI) const { in hasPseudoInstrPair()
2584 bool HexagonInstrInfo::hasUncondBranch(const MachineBasicBlock *B) in hasUncondBranch()
2597 bool HexagonInstrInfo::mayBeCurLoad(const MachineInstr *MI) const { in mayBeCurLoad()
2606 bool HexagonInstrInfo::mayBeNewStore(const MachineInstr *MI) const { in mayBeNewStore()
2612 bool HexagonInstrInfo::producesStall(const MachineInstr *ProdMI, in producesStall()
2631 bool HexagonInstrInfo::producesStall(const MachineInstr *MI, in producesStall()
2658 bool HexagonInstrInfo::predCanBeUsedAsDotNew(const MachineInstr *MI, in predCanBeUsedAsDotNew()
2673 bool HexagonInstrInfo::PredOpcodeHasJMP_c(unsigned Opcode) const { in PredOpcodeHasJMP_c()
2683 bool HexagonInstrInfo::predOpcodeHasNot(ArrayRef<MachineOperand> Cond) const { in predOpcodeHasNot()
2690 unsigned HexagonInstrInfo::getAddrMode(const MachineInstr* MI) const { in getAddrMode()
2698 unsigned HexagonInstrInfo::getBaseAndOffset(const MachineInstr *MI, in getBaseAndOffset()
2734 bool HexagonInstrInfo::getBaseAndOffsetPosition(const MachineInstr *MI, in getBaseAndOffsetPosition()
2771 SmallVector<MachineInstr*, 2> HexagonInstrInfo::getBranchingInstrs( in getBranchingInstrs()
2830 unsigned HexagonInstrInfo::getCExtOpNum(const MachineInstr *MI) const { in getCExtOpNum()
2837 HexagonII::CompoundGroup HexagonInstrInfo::getCompoundCandidateGroup( in getCompoundCandidateGroup()
2926 unsigned HexagonInstrInfo::getCompoundOpcode(const MachineInstr *GA, in getCompoundOpcode()
2944 int HexagonInstrInfo::getCondOpcode(int Opc, bool invertPredicate) const { in getCondOpcode()
2965 int HexagonInstrInfo::getDotCurOp(const MachineInstr* MI) const { in getDotCurOp()
3064 int HexagonInstrInfo::getDotNewOp(const MachineInstr* MI) const { in getDotNewOp()
3108 int HexagonInstrInfo::getDotNewPredJumpOp(const MachineInstr *MI, in getDotNewPredJumpOp()
3133 int HexagonInstrInfo::getDotNewPredOp(const MachineInstr *MI, in getDotNewPredOp()
3152 int HexagonInstrInfo::getDotOldOp(const int opc) const { in getDotOldOp()
3170 HexagonII::SubInstructionGroup HexagonInstrInfo::getDuplexCandidateGroup( in getDuplexCandidateGroup()
3512 short HexagonInstrInfo::getEquivalentHWInstr(const MachineInstr *MI) const { in getEquivalentHWInstr()
3518 MachineInstr *HexagonInstrInfo::getFirstNonDbgInst(MachineBasicBlock *BB) in getFirstNonDbgInst()
3530 unsigned HexagonInstrInfo::getInstrTimingClassLatency( in getInstrTimingClassLatency()
3555 bool HexagonInstrInfo::getInvertedPredSense( in getInvertedPredSense()
3565 unsigned HexagonInstrInfo::getInvertedPredicatedOpcode(const int Opc) const { in getInvertedPredicatedOpcode()
3577 int HexagonInstrInfo::getMaxValue(const MachineInstr *MI) const { in getMaxValue()
3591 unsigned HexagonInstrInfo::getMemAccessSize(const MachineInstr* MI) const { in getMemAccessSize()
3598 int HexagonInstrInfo::getMinValue(const MachineInstr *MI) const { in getMinValue()
3613 short HexagonInstrInfo::getNonExtOpcode(const MachineInstr *MI) const { in getNonExtOpcode()
3638 bool HexagonInstrInfo::getPredReg(ArrayRef<MachineOperand> Cond, in getPredReg()
3659 short HexagonInstrInfo::getPseudoInstrPair(const MachineInstr *MI) const { in getPseudoInstrPair()
3664 short HexagonInstrInfo::getRegForm(const MachineInstr *MI) const { in getRegForm()
3673 unsigned HexagonInstrInfo::getSize(const MachineInstr *MI) const { in getSize()
3708 uint64_t HexagonInstrInfo::getType(const MachineInstr* MI) const { in getType()
3714 unsigned HexagonInstrInfo::getUnits(const MachineInstr* MI) const { in getUnits()
3723 unsigned HexagonInstrInfo::getValidSubTargets(const unsigned Opcode) const { in getValidSubTargets()
3730 unsigned HexagonInstrInfo::nonDbgBBSize(const MachineBasicBlock *BB) const { in nonDbgBBSize()
3735 unsigned HexagonInstrInfo::nonDbgBundleSize( in nonDbgBundleSize()
3746 void HexagonInstrInfo::immediateExtend(MachineInstr *MI) const { in immediateExtend()
3760 bool HexagonInstrInfo::invertAndChangeJumpTarget( in invertAndChangeJumpTarget()
3781 void HexagonInstrInfo::genAllInsnTimingClasses(MachineFunction &MF) const { in genAllInsnTimingClasses()
3804 bool HexagonInstrInfo::reversePredSense(MachineInstr* MI) const { in reversePredSense()
3812 unsigned HexagonInstrInfo::reversePrediction(unsigned Opcode) const { in reversePrediction()
3824 bool HexagonInstrInfo::validateBranchCond(const ArrayRef<MachineOperand> &Cond) in validateBranchCond()