Lines Matching refs:G0

144   // t<cond> %icc,  rs => t<cond> %icc, G0 + rs
146                   (TICCrr G0, IntRegs:$rs2, condVal)>,
154   // t<cond> %xcc, rs => t<cond> %xcc, G0 + rs
156                   (TXCCrr G0, IntRegs:$rs2, condVal)>,
163   // t<cond> rs=> t<cond> %icc,  G0 + rs2
165                   (TICCrr G0, IntRegs:$rs2, condVal)>;
171   // t<cond> %icc, imm => t<cond> %icc, G0 + imm
173                   (TICCri G0, i32imm:$imm, condVal)>,
179   // t<cond> %xcc, imm => t<cond> %xcc, G0 + imm
181                   (TXCCri G0, i32imm:$imm, condVal)>,
188   // t<cond> imm => t<cond> %icc, G0 + imm
190                   (TICCri G0, i32imm:$imm, condVal)>;
302 def : InstAlias<"jmp $addr", (JMPLrr G0, MEMrr:$addr), 0>;
303 def : InstAlias<"jmp $addr", (JMPLri G0, MEMri:$addr), 0>;
310 def : InstAlias<"tst $rs2", (ORCCrr G0, IntRegs:$rs2, G0)>;
319 def : InstAlias<"restore", (RESTORErr G0, G0, G0)>;
322 def : InstAlias<"save", (SAVErr G0, G0, G0)>;
330 def : InstAlias<"not $rd", (XNORrr IntRegs:$rd, IntRegs:$rd, G0), 0>;
333 def : InstAlias<"not $rs1, $rd", (XNORrr IntRegs:$rd, IntRegs:$rs1, G0), 0>;
336 def : InstAlias<"neg $rd", (SUBrr IntRegs:$rd, G0, IntRegs:$rd), 0>;
339 def : InstAlias<"neg $rs2, $rd", (SUBrr IntRegs:$rd, G0, IntRegs:$rs2), 0>;
366 def : InstAlias<"btst $rs2, $rs1", (ANDCCrr G0, IntRegs:$rs1, IntRegs:$rs2), 0>;
367 def : InstAlias<"btst $simm13, $rs1", (ANDCCri G0, IntRegs:$rs1, i32imm:$simm13), 0>;
383 def : InstAlias<"clr $rd", (ORrr IntRegs:$rd, G0, G0), 0>;
386 def : InstAlias<"clrb [$addr]", (STBrr MEMrr:$addr, G0), 0>;
387 def : InstAlias<"clrb [$addr]", (STBri MEMri:$addr, G0), 0>;
388 def : InstAlias<"clrh [$addr]", (STHrr MEMrr:$addr, G0), 0>;
389 def : InstAlias<"clrh [$addr]", (STHri MEMri:$addr, G0), 0>;
390 def : InstAlias<"clr [$addr]", (STrr MEMrr:$addr, G0), 0>;
391 def : InstAlias<"clr [$addr]", (STri MEMri:$addr, G0), 0>;
395 def : InstAlias<"mov $rs2, $rd", (ORrr IntRegs:$rd, G0, IntRegs:$rs2)>;
396 def : InstAlias<"mov $simm13, $rd", (ORri IntRegs:$rd, G0, i32imm:$simm13)>;
405 def : InstAlias<"mov $rs2, $asr", (WRASRrr ASRRegs:$asr, G0, IntRegs:$rs2), 0>;
406 def : InstAlias<"mov $simm13, $asr", (WRASRri ASRRegs:$asr, G0, i32imm:$simm13), 0>;
407 def : InstAlias<"mov $rs2, %psr", (WRPSRrr G0, IntRegs:$rs2), 0>;
408 def : InstAlias<"mov $simm13, %psr", (WRPSRri G0, i32imm:$simm13), 0>;
409 def : InstAlias<"mov $rs2, %wim", (WRWIMrr G0, IntRegs:$rs2), 0>;
410 def : InstAlias<"mov $simm13, %wim", (WRWIMri G0, i32imm:$simm13), 0>;
411 def : InstAlias<"mov $rs2, %tbr", (WRTBRrr G0, IntRegs:$rs2), 0>;
412 def : InstAlias<"mov $simm13, %tbr", (WRTBRri G0, i32imm:$simm13), 0>;
419 def : InstAlias<"wr $rs2, $asr", (WRASRrr ASRRegs:$asr, G0, IntRegs:$rs2), 0>;
420 def : InstAlias<"wr $simm13, $asr", (WRASRri ASRRegs:$asr, G0, i32imm:$simm13), 0>;
421 def : InstAlias<"wr $rs2, %psr", (WRPSRrr G0, IntRegs:$rs2), 0>;
422 def : InstAlias<"wr $simm13, %psr", (WRPSRri G0, i32imm:$simm13), 0>;
423 def : InstAlias<"wr $rs2, %wim", (WRWIMrr G0, IntRegs:$rs2), 0>;
424 def : InstAlias<"wr $simm13, %wim", (WRWIMri G0, i32imm:$simm13), 0>;
425 def : InstAlias<"wr $rs2, %tbr", (WRTBRrr G0, IntRegs:$rs2), 0>;
426 def : InstAlias<"wr $simm13, %tbr", (WRTBRri G0, i32imm:$simm13), 0>;
458 def : InstAlias<"signx $rd", (SRArr IntRegs:$rd, IntRegs:$rd, G0), 0>, Requires<[HasV9]>;
461 def : InstAlias<"signx $rs1, $rd", (SRArr IntRegs:$rd, IntRegs:$rs1, G0), 0>, Requires<[HasV9]>;