Lines Matching refs:rs2

119   bits<5> rs2;
126   let Inst{4-0}  = rs2;
149   bits<5> rs2;
155   let Inst{4-0}  = rs2;
161   bits<5> rs2;
168   let Inst{4-0}  = rs2;
174   bits<5> rs2;
180   let Inst{4-0}  = rs2;
183 // Shift by register rs2.
187   bits<5> rs2;
194   let Inst{4-0}  = rs2;
214   def rr : F3_Sr<2, Op3Val, XVal, (outs RC:$rd), (ins RC:$rs1, IntRegs:$rs2),
215                  !strconcat(OpcStr, " $rs1, $rs2, $rd"),
216                  [(set VT:$rd, (OpNode VT:$rs1, i32:$rs2))]>;
239   bits<5> rs2;
241   let Inst{4-0}   = rs2;
270   bits<5> rs2;
277   let Inst{4-0}    = rs2;
284   bits <5> rs2;
289   let Inst{4-0}   = rs2;
322    bits<5> rs2;
325    let Inst{4-0}  = rs2;