699     setOperationAction(ISD::EXTRACT_VECTOR_ELT, VT,Expand);  in X86TargetLowering()
807     setOperationAction(ISD::EXTRACT_VECTOR_ELT, MVT::v4f32, Custom);  in X86TargetLowering()
881       setOperationAction(ISD::EXTRACT_VECTOR_ELT, VT, Custom);  in X86TargetLowering()
907     setOperationAction(ISD::EXTRACT_VECTOR_ELT, MVT::v2f64, Custom);  in X86TargetLowering()
911       setOperationAction(ISD::EXTRACT_VECTOR_ELT, MVT::v2i64, Custom);  in X86TargetLowering()
1014     setOperationAction(ISD::EXTRACT_VECTOR_ELT, MVT::v16i8, Custom);  in X86TargetLowering()
1015     setOperationAction(ISD::EXTRACT_VECTOR_ELT, MVT::v8i16, Custom);  in X86TargetLowering()
1016     setOperationAction(ISD::EXTRACT_VECTOR_ELT, MVT::v4i32, Custom);  in X86TargetLowering()
1017     setOperationAction(ISD::EXTRACT_VECTOR_ELT, MVT::v4f32, Custom);  in X86TargetLowering()
1023       setOperationAction(ISD::EXTRACT_VECTOR_ELT, MVT::v2i64, Custom);  in X86TargetLowering()
1284       setOperationAction(ISD::EXTRACT_VECTOR_ELT, VT, Custom);  in X86TargetLowering()
1479     setOperationAction(ISD::EXTRACT_VECTOR_ELT, MVT::v8i1,  Custom);  in X86TargetLowering()
1480     setOperationAction(ISD::EXTRACT_VECTOR_ELT, MVT::v16i1, Custom);  in X86TargetLowering()
1603         setOperationAction(ISD::EXTRACT_VECTOR_ELT,  VT, Custom);  in X86TargetLowering()
1644     setOperationAction(ISD::EXTRACT_VECTOR_ELT, MVT::v32i16, Custom);  in X86TargetLowering()
1645     setOperationAction(ISD::EXTRACT_VECTOR_ELT, MVT::v64i8, Custom);  in X86TargetLowering()
1795   setTargetDAGCombine(ISD::EXTRACT_VECTOR_ELT);  in X86TargetLowering()
5208     if (Elt.getOpcode() != ISD::EXTRACT_VECTOR_ELT ||  in LowerBuildVectorv4x32()
5713     if (Opc != ISD::EXTRACT_VECTOR_ELT) {  in buildFromShuffleMostly()
5918     CanFold = (Op0.getOpcode() == ISD::EXTRACT_VECTOR_ELT &&  in isHorizontalBinOp()
5919         Op1.getOpcode() == ISD::EXTRACT_VECTOR_ELT &&  in isHorizontalBinOp()
6076     if (Op0.getOpcode() != ISD::EXTRACT_VECTOR_ELT ||  in LowerToAddSub()
6077         Op1.getOpcode() != ISD::EXTRACT_VECTOR_ELT ||  in LowerToAddSub()
11507           DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, MVT::i32,  in LowerEXTRACT_VECTOR_ELT_SSE4()
11531     SDValue Extract = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, MVT::i32,  in LowerEXTRACT_VECTOR_ELT_SSE4()
11564     SDValue Elt = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl,  in ExtractBitFromMaskVector()
11609       return DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, Op.getValueType(), Perm,  in LowerEXTRACT_VECTOR_ELT()
11630     return DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, Op.getValueType(), Vec,  in LowerEXTRACT_VECTOR_ELT()
11646                          DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, MVT::i32,  in LowerEXTRACT_VECTOR_ELT()
11668     return DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, VT, Vec,  in LowerEXTRACT_VECTOR_ELT()
11686     return DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, VT, Vec,  in LowerEXTRACT_VECTOR_ELT()
12682   return DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, MVT::f64, Result,  in LowerUINT_TO_FP_i64()
12701   Load = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, MVT::f64,  in LowerUINT_TO_FP_i32()
12713       DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, MVT::f64,  in LowerUINT_TO_FP_i32()
13544   return DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, VT, LogicNode,  in LowerFABSorFNEG()
13609           DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, SrcVT, SignBit,  in LowerFCOPYSIGN()
13633       DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, SrcVT, Val,  in LowerFCOPYSIGN()
13684     if (I->getOpcode() != ISD::EXTRACT_VECTOR_ELT)  in LowerVectorAllZeroTest()
14865         return DAG.getNode(ISD::EXTRACT_VECTOR_ELT, DL, VT,  in LowerSELECT()
18520           BaseShAmt = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, EltVT, InVec,  in LowerScalarVariableShift()
19357       Elts.push_back(DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, SVT, InVec,  in LowerBITCAST()
19366     return DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, MVT::f64, ToV2F64,  in LowerBITCAST()
19737   SDValue SinVal = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, ArgVT,  in LowerFSINCOS()
19739   SDValue CosVal = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, ArgVT,  in LowerFSINCOS()
20066   case ISD::EXTRACT_VECTOR_ELT: return LowerEXTRACT_VECTOR_ELT(Op, DAG);  in LowerOperation()
20400       Elts.push_back(DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, SVT,  in ReplaceNodeResults()
23716   return DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, N->getValueType(0), Shuffle,  in XFormVExtractWithShuffleIntoLoad()
23788     if (MMXSrc.getOpcode() == ISD::EXTRACT_VECTOR_ELT && MMXSrc.hasOneUse() &&  in PerformEXTRACT_VECTOR_ELTCombine()
23827     if (Extract->getOpcode() != ISD::EXTRACT_VECTOR_ELT)  in PerformEXTRACT_VECTOR_ELTCombine()
23861     SDValue BottomHalf = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, MVT::i64, Cst,  in PerformEXTRACT_VECTOR_ELTCombine()
23863     SDValue TopHalf = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, MVT::i64, Cst,  in PerformEXTRACT_VECTOR_ELTCombine()
25198             OnesOrZeroesF = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, DL, MVT::f32,  in CMPEQCombine()
26243       SDValue SubVec = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl,  in PerformSTORECombine()
26371       St->getOperand(1).getOpcode() == ISD::EXTRACT_VECTOR_ELT) {  in PerformSTORECombine()
26377     SDValue NewExtract = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, MVT::f64,  in PerformSTORECombine()
27657       V.getOperand(0).getOpcode() == ISD::EXTRACT_VECTOR_ELT &&  in performVZEXTCombine()
27684   case ISD::EXTRACT_VECTOR_ELT:  in PerformDAGCombine()