Lines Matching refs:DstRC

1469 multiclass sse12_cvt_s<bits<8> opc, RegisterClass SrcRC, RegisterClass DstRC,
1472   def rr : SI<opc, MRMSrcReg, (outs DstRC:$dst), (ins SrcRC:$src), asm,
1473                         [(set DstRC:$dst, (OpNode SrcRC:$src))],
1475   def rm : SI<opc, MRMSrcMem, (outs DstRC:$dst), (ins x86memop:$src), asm,
1476                         [(set DstRC:$dst, (OpNode (ld_frag addr:$src)))],
1480 multiclass sse12_cvt_p<bits<8> opc, RegisterClass SrcRC, RegisterClass DstRC,
1484   def rr : I<opc, MRMSrcReg, (outs DstRC:$dst), (ins SrcRC:$src), asm,
1487   def rm : I<opc, MRMSrcMem, (outs DstRC:$dst), (ins x86memop:$src), asm,
1492 multiclass sse12_vcvt_avx<bits<8> opc, RegisterClass SrcRC, RegisterClass DstRC,
1495   def rr : SI<opc, MRMSrcReg, (outs DstRC:$dst), (ins DstRC:$src1, SrcRC:$src),
1499   def rm : SI<opc, MRMSrcMem, (outs DstRC:$dst),
1500               (ins DstRC:$src1, x86memop:$src),
1629 multiclass sse12_cvt_sint<bits<8> opc, RegisterClass SrcRC, RegisterClass DstRC,
1632   def rr : SI<opc, MRMSrcReg, (outs DstRC:$dst), (ins SrcRC:$src),
1634               [(set DstRC:$dst, (Int SrcRC:$src))], itins.rr>,
1636   def rm : SI<opc, MRMSrcMem, (outs DstRC:$dst), (ins memop:$src),
1638               [(set DstRC:$dst, (Int mem_cpat:$src))], itins.rm>,
1643                     RegisterClass DstRC, Intrinsic Int, X86MemOperand x86memop,
1646   def rr : SI<opc, MRMSrcReg, (outs DstRC:$dst), (ins DstRC:$src1, SrcRC:$src2),
1650               [(set DstRC:$dst, (Int DstRC:$src1, SrcRC:$src2))],
1652   def rm : SI<opc, MRMSrcMem, (outs DstRC:$dst),
1653               (ins DstRC:$src1, x86memop:$src2),
1657               [(set DstRC:$dst, (Int DstRC:$src1, (ld_frag addr:$src2)))],