Lines Matching refs:VEX_LIG
573 VEX_4V, VEX_LIG;
578 VEX, VEX_LIG, Sched<[WriteStore]>;
598 IIC_SSE_MOV_S_RM, d>, VEX, VEX_LIG, Sched<[WriteLoad]>;
1510 XS, VEX, VEX_LIG;
1514 XS, VEX, VEX_W, VEX_LIG;
1518 XD, VEX, VEX_LIG;
1522 XD, VEX, VEX_W, VEX_LIG;
1546 XS, VEX_4V, VEX_LIG;
1548 XS, VEX_4V, VEX_W, VEX_LIG;
1550 XD, VEX_4V, VEX_LIG;
1552 XD, VEX_4V, VEX_W, VEX_LIG;
1664 SSE_CVT_SD2SI>, XD, VEX, VEX_LIG;
1667 SSE_CVT_SD2SI>, XD, VEX, VEX_W, VEX_LIG;
1745 SSE_CVT_SS2SI_32>, XS, VEX, VEX_LIG;
1748 SSE_CVT_SS2SI_64>, XS, VEX, VEX_W, VEX_LIG;
1814 IIC_SSE_CVT_Scalar_RR>, VEX_4V, VEX_LIG,
1821 XD, Requires<[HasAVX, OptForSize]>, VEX_4V, VEX_LIG,
1880 XS, Requires<[HasAVX]>, VEX_4V, VEX_LIG,
1887 XS, VEX_4V, VEX_LIG, Requires<[HasAVX, OptForSize]>,
2370 SSE_ALU_F32S, i8immZExt5>, XS, VEX_4V, VEX_LIG;
2375 XD, VEX_4V, VEX_LIG;
2446 "ucomiss">, PS, VEX, VEX_LIG;
2448 "ucomisd">, PD, VEX, VEX_LIG;
2451 "comiss">, PS, VEX, VEX_LIG;
2453 "comisd">, PD, VEX, VEX_LIG;
3074 XS, VEX_4V, VEX_LIG;
3077 XD, VEX_4V, VEX_LIG;
3093 SSEPackedSingle, itins.s, 0>, XS, VEX_4V, VEX_LIG;
3096 SSEPackedDouble, itins.d, 0>, XD, VEX_4V, VEX_LIG;
3528 SSEPackedSingle, itins, "SS">, XS, VEX_4V, VEX_LIG;
3541 XD, VEX_4V, VEX_LIG;
6526 int_x86_sse41_round_sd, 0>, VEX_4V, VEX_LIG;