Lines Matching refs:rev64
389 ; CHECK-NEXT: rev64 v{{[0-9]+}}.8b, v[[REG1]].8b
393 ; CHECK-NEXT: rev64 v{{[0-9]+}}.4h, v[[REG1]].4h
397 ; CHECK-NEXT: rev64 v{{[0-9]+}}.2s, v[[REG1]].2s
404 ; CHECK-NEXT: rev64 v[[REG2:[0-9]+]].16b, v[[REG1]].16b
409 ; CHECK-NEXT: rev64 v[[REG2:[0-9]+]].8h, v[[REG1]].8h
414 ; CHECK-NEXT: rev64 v[[REG2:[0-9]+]].4s, v[[REG1]].4s
429 ; CHECK-NEXT: rev64 v{{[0-9]+}}.8b, v[[REG1]].8b
433 ; CHECK-NEXT: rev64 v{{[0-9]+}}.4h, v[[REG1]].4h
437 ; CHECK-NEXT: rev64 v{{[0-9]+}}.2s, v[[REG1]].2s
444 ; CHECK-NEXT: rev64 v[[REG2:[0-9]+]].16b, v[[REG1]].16b
449 ; CHECK-NEXT: rev64 v[[REG2:[0-9]+]].8h, v[[REG1]].8h
454 ; CHECK-NEXT: rev64 v[[REG2:[0-9]+]].4s, v[[REG1]].4s
469 ; CHECK-NEXT: rev64 v{{[0-9]+}}.8b, v[[REG1]].8b
473 ; CHECK-NEXT: rev64 v{{[0-9]+}}.4h, v[[REG1]].4h
477 ; CHECK-NEXT: rev64 v{{[0-9]+}}.2s, v[[REG1]].2s
484 ; CHECK-NEXT: rev64 v[[REG2:[0-9]+]].16b, v[[REG1]].16b
489 ; CHECK-NEXT: rev64 v[[REG2:[0-9]+]].8h, v[[REG1]].8h
494 ; CHECK-NEXT: rev64 v[[REG2:[0-9]+]].4s, v[[REG1]].4s
509 ; CHECK-NEXT: rev64 v{{[0-9]+}}.8b, v[[REG1]].8b
513 ; CHECK-NEXT: rev64 v{{[0-9]+}}.4h, v[[REG1]].4h
517 ; CHECK-NEXT: rev64 v{{[0-9]+}}.2s, v[[REG1]].2s
524 ; CHECK-NEXT: rev64 v[[REG2:[0-9]+]].16b, v[[REG1]].16b
529 ; CHECK-NEXT: rev64 v[[REG2:[0-9]+]].8h, v[[REG1]].8h
534 ; CHECK-NEXT: rev64 v[[REG2:[0-9]+]].4s, v[[REG1]].4s
549 ; CHECK-NEXT: rev64 v{{[0-9]+}}.8b, v[[REG1]].8b
553 ; CHECK-NEXT: rev64 v{{[0-9]+}}.4h, v[[REG1]].4h
557 ; CHECK-NEXT: rev64 v{{[0-9]+}}.2s, v[[REG1]].2s
564 ; CHECK-NEXT: rev64 v[[REG2:[0-9]+]].16b, v[[REG1]].16b
569 ; CHECK-NEXT: rev64 v[[REG2:[0-9]+]].8h, v[[REG1]].8h
574 ; CHECK-NEXT: rev64 v[[REG2:[0-9]+]].4s, v[[REG1]].4s
589 ; CHECK-NEXT: rev64 v{{[0-9]+}}.8b, v[[REG1]].8b
593 ; CHECK-NEXT: rev64 v{{[0-9]+}}.4h, v[[REG1]].4h
597 ; CHECK-NEXT: rev64 v{{[0-9]+}}.2s, v[[REG1]].2s
604 ; CHECK-NEXT: rev64 v[[REG2:[0-9]+]].16b, v[[REG1]].16b
609 ; CHECK-NEXT: rev64 v[[REG2:[0-9]+]].8h, v[[REG1]].8h
614 ; CHECK-NEXT: rev64 v[[REG2:[0-9]+]].4s, v[[REG1]].4s
629 ; CHECK-NEXT: rev64 v{{[0-9]+}}.8b, v[[REG1]].8b
633 ; CHECK-NEXT: rev64 v{{[0-9]+}}.4h, v[[REG1]].4h
637 ; CHECK-NEXT: rev64 v{{[0-9]+}}.2s, v[[REG1]].2s
644 ; CHECK-NEXT: rev64 v[[REG2:[0-9]+]].16b, v[[REG1]].16b
649 ; CHECK-NEXT: rev64 v[[REG2:[0-9]+]].8h, v[[REG1]].8h
654 ; CHECK-NEXT: rev64 v[[REG2:[0-9]+]].4s, v[[REG1]].4s
669 ; CHECK-NEXT: rev64 v{{[0-9]+}}.8b, v[[REG1]].8b
673 ; CHECK-NEXT: rev64 v{{[0-9]+}}.4h, v[[REG1]].4h
677 ; CHECK-NEXT: rev64 v{{[0-9]+}}.2s, v[[REG1]].2s
684 ; CHECK-NEXT: rev64 v[[REG2:[0-9]+]].16b, v[[REG1]].16b
689 ; CHECK-NEXT: rev64 v[[REG2:[0-9]+]].8h, v[[REG1]].8h
694 ; CHECK-NEXT: rev64 v[[REG2:[0-9]+]].4s, v[[REG1]].4s
709 ; CHECK-NEXT: rev64 v{{[0-9]+}}.8b, v[[REG1]].8b
713 ; CHECK-NEXT: rev64 v{{[0-9]+}}.4h, v[[REG1]].4h
717 ; CHECK-NEXT: rev64 v{{[0-9]+}}.2s, v[[REG1]].2s
721 ; CHECK-NEXT: rev64 v[[REG2:[0-9]+]].16b, v[[REG1]].16b
726 ; CHECK-NEXT: rev64 v[[REG2:[0-9]+]].8h, v[[REG1]].8h
731 ; CHECK-NEXT: rev64 v[[REG2:[0-9]+]].4s, v[[REG1]].4s
742 ; CHECK-NEXT: rev64 v{{[0-9]+}}.8b, v[[REG1]].8b
746 ; CHECK-NEXT: rev64 v{{[0-9]+}}.4h, v[[REG1]].4h
750 ; CHECK-NEXT: rev64 v{{[0-9]+}}.2s, v[[REG1]].2s
754 ; CHECK-NEXT: rev64 v[[REG2:[0-9]+]].16b, v[[REG1]].16b
759 ; CHECK-NEXT: rev64 v[[REG2:[0-9]+]].8h, v[[REG1]].8h
764 ; CHECK-NEXT: rev64 v[[REG2:[0-9]+]].4s, v[[REG1]].4s
775 ; CHECK-NEXT: rev64 v{{[0-9]+}}.8b, v[[REG1]].8b
779 ; CHECK-NEXT: rev64 v{{[0-9]+}}.4h, v[[REG1]].4h
783 ; CHECK-NEXT: rev64 v{{[0-9]+}}.2s, v[[REG1]].2s
790 ; CHECK-NEXT: rev64 v[[REG2:[0-9]+]].16b, v[[REG1]].16b
795 ; CHECK-NEXT: rev64 v[[REG2:[0-9]+]].8h, v[[REG1]].8h
800 ; CHECK-NEXT: rev64 v[[REG2:[0-9]+]].4s, v[[REG1]].4s
815 ; CHECK-NEXT: rev64 v[[REG2:[0-9]+]].16b, v[[REG1]].16b
820 ; CHECK-NEXT: rev64 v[[REG2:[0-9]+]].8h, v[[REG1]].8h
825 ; CHECK-NEXT: rev64 v[[REG2:[0-9]+]].4s, v[[REG1]].4s