Lines Matching refs:VAL64

5 ; CHECK: fcvtl [[VAL64:v[0-9]+]].2d, v0.2s
6 ; CHECK: fcvtzs.2d v0, [[VAL64]]
14 ; CHECK: fcvtl [[VAL64:v[0-9]+]].2d, v0.2s
15 ; CHECK: fcvtzu.2d v0, [[VAL64]]
55 ; CHECK: fcvtzs.4s [[VAL64:v[0-9]+]], v0
56 ; CHECK: xtn.4h v0, [[VAL64]]
64 ; CHECK: fcvtzu.4s [[VAL64:v[0-9]+]], v0
65 ; CHECK: xtn.4h v0, [[VAL64]]
73 ; CHECK: fcvtzs.4s [[VAL64:v[0-9]+]], v0
74 ; CHECK: xtn.4h v0, [[VAL64]]
82 ; CHECK: fcvtzs.4s [[VAL64:v[0-9]+]], v0
83 ; CHECK: xtn.4h v0, [[VAL64]]
91 ; CHECK: fcvtzs.2d [[VAL64:v[0-9]+]], v0
92 ; CHECK: xtn.2s v0, [[VAL64]]
100 ; CHECK: fcvtzu.2d [[VAL64:v[0-9]+]], v0
101 ; CHECK: xtn.2s v0, [[VAL64]]
109 ; CHECK: fcvtzs.2d [[VAL64:v[0-9]+]], v0
110 ; CHECK: xtn.2s v0, [[VAL64]]
118 ; CHECK: fcvtzs.2d [[VAL64:v[0-9]+]], v0
119 ; CHECK: xtn.2s v0, [[VAL64]]
127 ; CHECK: fcvtzs.2d [[VAL64:v[0-9]+]], v0
128 ; CHECK: xtn.2s v0, [[VAL64]]
136 ; CHECK: fcvtzs.2d [[VAL64:v[0-9]+]], v0
137 ; CHECK: xtn.2s v0, [[VAL64]]