Lines Matching refs:P1
4 define i32 @test12(i1 %B, i32* %P1, i32* %P2) {
5 %load0 = load i32, i32* %P1
7 %load1 = load i32, i32* %P1
10 ; CHECK: load i32, i32* %P1
11 ; CHECK: load i32, i32* %P1
16 define i32 @test13(i1 %B, i32* %P1) {
17 %a = load atomic i32, i32* %P1 seq_cst, align 4
18 %b = load i32, i32* %P1
21 ; CHECK: load atomic i32, i32* %P1
27 define i32 @test14(i1 %B, i32* %P1) {
28 %a = load atomic i32, i32* %P1 seq_cst, align 4
29 %b = load atomic i32, i32* %P1 unordered, align 4
32 ; CHECK: load atomic i32, i32* %P1 seq_cst
39 define i32 @test15(i1 %B, i32* %P1, i32* %P2) {
40 %a = load atomic i32, i32* %P1 seq_cst, align 4
41 %b = load atomic i32, i32* %P1 seq_cst, align 4
44 ; CHECK: load atomic i32, i32* %P1
45 ; CHECK: load atomic i32, i32* %P1
53 define i32 @test16(i1 %B, i32* %P1, i32* %P2) {
54 %a = load i32, i32* %P1, align 4
55 %b = load atomic i32, i32* %P1 unordered, align 4
58 ; CHECK: load i32, i32* %P1
59 ; CHECK: load atomic i32, i32* %P1
63 define void @fence_seq_cst_store(i1 %B, i32* %P1, i32* %P2) {
68 store i32 0, i32* %P1, align 4
70 store i32 0, i32* %P1, align 4
75 define void @fence_seq_cst(i1 %B, i32* %P1, i32* %P2) {
80 store i32 0, i32* %P1, align 4
82 store i32 0, i32* %P1, align 4
87 define void @fence_asm_sideeffect(i1 %B, i32* %P1, i32* %P2) {
92 store i32 0, i32* %P1, align 4
94 store i32 0, i32* %P1, align 4
99 define void @fence_asm_memory(i1 %B, i32* %P1, i32* %P2) {
104 store i32 0, i32* %P1, align 4
106 store i32 0, i32* %P1, align 4
111 define i32 @volatile_load(i1 %B, i32* %P1, i32* %P2) {
112 %a = load i32, i32* %P1, align 4
113 %b = load volatile i32, i32* %P1, align 4
117 ; CHECK: load i32, i32* %P1
118 ; CHECK: load volatile i32, i32* %P1
122 define i32 @redundant_volatile_load(i1 %B, i32* %P1, i32* %P2) {
123 %a = load volatile i32, i32* %P1, align 4
124 %b = load volatile i32, i32* %P1, align 4
128 ; CHECK: load volatile i32, i32* %P1
129 ; CHECK: load volatile i32, i32* %P1
134 define void @volatile_store(i1 %B, i32* %P1, i32* %P2) {
138 store volatile i32 0, i32* %P1, align 4
139 store i32 3, i32* %P1, align 4
144 define void @redundant_volatile_store(i1 %B, i32* %P1, i32* %P2) {
148 store volatile i32 0, i32* %P1, align 4
149 store volatile i32 0, i32* %P1, align 4
154 define i32 @test20(i1 %B, i32* %P1, i32* %P2) {
155 %a = load volatile i32, i32* %P1, align 4
156 %b = load i32, i32* %P1, align 4
160 ; CHECK: load volatile i32, i32* %P1
166 define void @test21(i1 %B, i32* %P1, i32* %P2) {
170 store i32 0, i32* %P1, align 4
171 store volatile i32 3, i32* %P1, align 4
176 define void @test22(i1 %B, i32* %P1, i32* %P2) {
179 store i32 0, i32* %P1, align 4
180 store atomic i32 3, i32* %P1 unordered, align 4
185 define void @test23(i1 %B, i32* %P1, i32* %P2) {
188 store atomic i32 3, i32* %P1 unordered, align 4
189 store i32 0, i32* %P1, align 4
196 define void @test24(i1 %B, i32* %P1, i32* %P2) {
200 store atomic i32 3, i32* %P1 release, align 4
201 store i32 0, i32* %P1, align 4
207 define void @test25(i1 %B, i32* %P1, i32* %P2) {
211 store volatile i32 3, i32* %P1, align 4
212 store volatile i32 0, i32* %P1, align 4
217 define void @test26(i1 %B, i32* %P1, i32* %P2) {
219 ; CHECK-NEXT: store atomic i32 3, i32* %P1 unordered, align 4
221 store atomic i32 0, i32* %P1 unordered, align 4
222 store atomic i32 3, i32* %P1 unordered, align 4
228 define void @test27(i1 %B, i32* %P1, i32* %P2) {
230 ; CHECK-NEXT: store atomic i32 0, i32* %P1 unordered, align 4
231 ; CHECK-NEXT: store atomic i32 3, i32* %P1 release, align 4
233 store atomic i32 0, i32* %P1 unordered, align 4
234 store atomic i32 3, i32* %P1 release, align 4
240 define void @test28(i1 %B, i32* %P1, i32* %P2) {
242 ; CHECK-NEXT: store atomic i32 0, i32* %P1 unordered, align 4
243 ; CHECK-NEXT: store atomic i32 3, i32* %P1 release, align 4
245 store atomic i32 0, i32* %P1 unordered, align 4
246 store atomic i32 3, i32* %P1 release, align 4
252 define void @test29(i1 %B, i32* %P1, i32* %P2) {
256 store atomic i32 3, i32* %P1 release, align 4
257 store atomic i32 0, i32* %P1 unordered, align 4