Lines Matching refs:iMem
12525 int iMem; /* Memory location that acts as accumulator */ member
12535 int iMem; /* Memory location that acts as accumulator */ member
87236 static void codeReal(Vdbe *v, const char *z, int negateFlag, int iMem){
87242 sqlite3VdbeAddOp4Dup8(v, OP_Real, 0, iMem, 0, (u8*)&value, P4_REAL);
87254 static void codeInteger(Parse *pParse, Expr *pExpr, int negFlag, int iMem){
87260 sqlite3VdbeAddOp2(v, OP_Integer, i, iMem);
87269 sqlite3VdbeAddOp4Dup8(v, OP_Int64, 0, iMem, 0, (u8*)&value, P4_INT64);
87280 codeReal(v, z, negFlag, iMem);
87624 assert( pCol->iMem>0 );
87625 inReg = pCol->iMem;
87837 inReg = pInfo->aFunc[pExpr->iAgg].iMem;
88324 int iMem;
88329 iMem = ++pParse->nMem;
88330 sqlite3VdbeAddOp2(v, OP_Copy, target, iMem);
88331 exprToRegister(pExpr, iMem);
89012 pCol->iMem = ++pParse->nMem;
89070 pItem->iMem = ++pParse->nMem;
90998 int iMem, /* Available memory locations begin here */
91010 int regNewRowid = iMem++; /* Rowid for the inserted record */
91011 int regStat4 = iMem++; /* Register to hold Stat4Accum object */
91012 int regChng = iMem++; /* Index of changed index field */
91014 int regRowid = iMem++; /* Rowid argument passed to stat_push() */
91016 int regTemp = iMem++; /* Temporary use register */
91017 int regTabname = iMem++; /* Register containing table name */
91018 int regIdxname = iMem++; /* Register containing index name */
91019 int regStat1 = iMem++; /* Value for the stat column of sqlite_stat1 */
91020 int regPrev = iMem; /* MUST BE LAST (see below) */
91022 pParse->nMem = MAX(pParse->nMem, iMem);
91334 int iMem;
91341 iMem = pParse->nMem+1;
91346 analyzeOneTable(pParse, pTab, 0, iStatCur, iMem, iTab);
96109 int iMem = ++pParse->nMem;
96123 sqlite3VdbeAddOp2(v, OP_CreateIndex, iDb, iMem);
96147 iMem,
96156 sqlite3RefillIndex(pParse, pIndex, iMem);
109272 int iMem /* First element */
109279 sqlite3VdbeAddOp4Int(v, OP_Found, iTab, addrRepeat, iMem, N); VdbeCoverage(v);
109280 sqlite3VdbeAddOp3(v, OP_MakeRecord, iMem, N, r1);
113253 assert( pAggInfo->aCol[i].iMem>=pAggInfo->mnReg
113254 && pAggInfo->aCol[i].iMem<=pAggInfo->mxReg );
113257 assert( pAggInfo->aFunc[i].iMem>=pAggInfo->mnReg
113258 && pAggInfo->aFunc[i].iMem<=pAggInfo->mxReg );
113290 sqlite3VdbeAddOp4(v, OP_AggFinal, pF->iMem, pList ? pList->nExpr : 0, 0,
113342 sqlite3VdbeAddOp4(v, OP_AggStep0, 0, regAgg, pF->iMem,
113368 sqlite3ExprCode(pParse, pC->pExpr, pC->iMem);
114150 sqlite3VdbeAddOp2(v, OP_Count, iCsr, sAggInfo.aFunc[0].iMem);