Lines Matching refs:src3

328   void Push(Register src1, Register src2, Register src3, Condition cond = al) {
329     DCHECK(!AreAliased(src1, src2, src3));
331       if (src2.code() > src3.code()) {
332         stm(db_w, sp, src1.bit() | src2.bit() | src3.bit(), cond);
335         str(src3, MemOperand(sp, 4, NegPreIndex), cond);
339       Push(src2, src3, cond);
346             Register src3,
349     DCHECK(!AreAliased(src1, src2, src3, src4));
351       if (src2.code() > src3.code()) {
352         if (src3.code() > src4.code()) {
355               src1.bit() | src2.bit() | src3.bit() | src4.bit(),
358           stm(db_w, sp, src1.bit() | src2.bit() | src3.bit(), cond);
363         Push(src3, src4, cond);
367       Push(src2, src3, src4, cond);
372   void Push(Register src1, Register src2, Register src3, Register src4,
374     DCHECK(!AreAliased(src1, src2, src3, src4, src5));
376       if (src2.code() > src3.code()) {
377         if (src3.code() > src4.code()) {
380                 src1.bit() | src2.bit() | src3.bit() | src4.bit() | src5.bit(),
383             stm(db_w, sp, src1.bit() | src2.bit() | src3.bit() | src4.bit(),
388           stm(db_w, sp, src1.bit() | src2.bit() | src3.bit(), cond);
393         Push(src3, src4, src5, cond);
397       Push(src2, src3, src4, src5, cond);
413   void Pop(Register src1, Register src2, Register src3, Condition cond = al) {
414     DCHECK(!AreAliased(src1, src2, src3));
416       if (src2.code() > src3.code()) {
417         ldm(ia_w, sp, src1.bit() | src2.bit() | src3.bit(), cond);
419         ldr(src3, MemOperand(sp, 4, PostIndex), cond);
423       Pop(src2, src3, cond);
431            Register src3,
434     DCHECK(!AreAliased(src1, src2, src3, src4));
436       if (src2.code() > src3.code()) {
437         if (src3.code() > src4.code()) {
440               src1.bit() | src2.bit() | src3.bit() | src4.bit(),
444           ldm(ia_w, sp, src1.bit() | src2.bit() | src3.bit(), cond);
447         Pop(src3, src4, cond);
451       Pop(src2, src3, src4, cond);