845         vai.hwcaps  = VEX_HWCAPS_X86_MMXEXT;  in VG_()
846         vai.hwcaps |= VEX_HWCAPS_X86_SSE1;  in VG_()
847         vai.hwcaps |= VEX_HWCAPS_X86_SSE2;  in VG_()
848         vai.hwcaps |= VEX_HWCAPS_X86_SSE3;  in VG_()
850            vai.hwcaps |= VEX_HWCAPS_X86_LZCNT;  in VG_()
853         vai.hwcaps  = VEX_HWCAPS_X86_MMXEXT;  in VG_()
854         vai.hwcaps |= VEX_HWCAPS_X86_SSE1;  in VG_()
855         vai.hwcaps |= VEX_HWCAPS_X86_SSE2;  in VG_()
857            vai.hwcaps |= VEX_HWCAPS_X86_LZCNT;  in VG_()
860         vai.hwcaps  = VEX_HWCAPS_X86_MMXEXT;  in VG_()
861         vai.hwcaps |= VEX_HWCAPS_X86_SSE1;  in VG_()
864         vai.hwcaps  = VEX_HWCAPS_X86_MMXEXT; /*integer only sse1 subset*/  in VG_()
867        vai.hwcaps = 0; /*baseline - no sse at all*/  in VG_()
987      vai.hwcaps  = (have_sse3   ? VEX_HWCAPS_AMD64_SSE3   : 0)  in VG_()
1144      vai.hwcaps = 0;  in VG_()
1145      if (have_F)  vai.hwcaps |= VEX_HWCAPS_PPC32_F;  in VG_()
1146      if (have_V)  vai.hwcaps |= VEX_HWCAPS_PPC32_V;  in VG_()
1147      if (have_FX) vai.hwcaps |= VEX_HWCAPS_PPC32_FX;  in VG_()
1148      if (have_GX) vai.hwcaps |= VEX_HWCAPS_PPC32_GX;  in VG_()
1149      if (have_VX) vai.hwcaps |= VEX_HWCAPS_PPC32_VX;  in VG_()
1150      if (have_DFP) vai.hwcaps |= VEX_HWCAPS_PPC32_DFP;  in VG_()
1151      if (have_isa_2_07) vai.hwcaps |= VEX_HWCAPS_PPC32_ISA2_07;  in VG_()
1289      vai.hwcaps = 0;  in VG_()
1290      if (have_V)  vai.hwcaps |= VEX_HWCAPS_PPC64_V;  in VG_()
1291      if (have_FX) vai.hwcaps |= VEX_HWCAPS_PPC64_FX;  in VG_()
1292      if (have_GX) vai.hwcaps |= VEX_HWCAPS_PPC64_GX;  in VG_()
1293      if (have_VX) vai.hwcaps |= VEX_HWCAPS_PPC64_VX;  in VG_()
1294      if (have_DFP) vai.hwcaps |= VEX_HWCAPS_PPC64_DFP;  in VG_()
1295      if (have_isa_2_07) vai.hwcaps |= VEX_HWCAPS_PPC64_ISA2_07;  in VG_()
1382      vai.hwcaps = model;  in VG_()
1383      if (have_STFLE) vai.hwcaps |= VEX_HWCAPS_S390X_STFLE;  in VG_()
1388            vai.hwcaps |= VEX_HWCAPS_S390X_LDISP;  in VG_()
1418            vai.hwcaps |= fac_hwcaps[i].hwcaps_bit;  in VG_()
1436      VG_(debugLog)(1, "machine", "hwcaps = 0x%x\n", vai.hwcaps);  in VG_()
1544      vai.hwcaps = VEX_ARM_ARCHLEVEL(archlevel);  in VG_()
1545      if (have_VFP3) vai.hwcaps |= VEX_HWCAPS_ARM_VFP3;  in VG_()
1546      if (have_VFP2) vai.hwcaps |= VEX_HWCAPS_ARM_VFP2;  in VG_()
1547      if (have_VFP)  vai.hwcaps |= VEX_HWCAPS_ARM_VFP;  in VG_()
1548      if (have_NEON) vai.hwcaps |= VEX_HWCAPS_ARM_NEON;  in VG_()
1561      vai.hwcaps = 0;  in VG_()
1590      vai.hwcaps = model;  in VG_()
1639            vai.hwcaps |= VEX_PRID_IMP_74K;  in VG_()
1650               vai.hwcaps |= VEX_PRID_IMP_34K;  in VG_()
1662         vai.hwcaps |= VEX_PRID_CPU_32FPR;  in VG_()
1669      VG_(debugLog)(1, "machine", "hwcaps = 0x%x\n", vai.hwcaps);  in VG_()
1682      vai.hwcaps = model;  in VG_()
1700      vai.hwcaps = VEX_HWCAPS_TILEGX_BASE;  in VG_()
1757       vai.hwcaps |= VEX_HWCAPS_ARM_NEON;  in VG_()
1759       vai.hwcaps &= ~VEX_HWCAPS_ARM_NEON;  in VG_()
1805    return (vai.hwcaps & VEX_HWCAPS_AMD64_AVX) ? 32 : 16;  in VG_()
1809    if (vai.hwcaps & VEX_HWCAPS_PPC32_V) return 16;  in VG_()
1810    if (vai.hwcaps & VEX_HWCAPS_PPC32_VX) return 16;  in VG_()
1811    if (vai.hwcaps & VEX_HWCAPS_PPC32_DFP) return 16;  in VG_()
1816    if (vai.hwcaps & VEX_HWCAPS_PPC64_V) return 16;  in VG_()
1817    if (vai.hwcaps & VEX_HWCAPS_PPC64_VX) return 16;  in VG_()
1818    if (vai.hwcaps & VEX_HWCAPS_PPC64_DFP) return 16;  in VG_()