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Lines Matching refs:QD

51 #define TESTINSN_imm(instruction, QD, imm) \  argument
56 "vmov.i8 " #QD ", #0x55" "\n\t" \
58 "vstmia %0, {" #QD "}\n\t" \
61 : #QD, "memory" \
72 "vldmia %1!, {" #QD "}\n\t" \
74 "vstmia %0, {" #QD "}\n\t" \
77 : #QD, "%2", "memory" \
83 #define TESTINSN_un(instruction, QD, QM, QMtype, QMval) \ argument
88 "vmov.i8 " #QD ", #0x55" "\n\t" \
91 "vstmia %0, {" #QD "}\n\t" \
94 : #QD, #QM, "memory" \
105 "vldmia %2!, {" #QD "}\n\t" \
108 "vstmia %0, {" #QD "}\n\t" \
111 : #QD, #QM, "%2", "memory" \
118 #define TESTINSN_un_q(instruction, QD, QM, QMtype, QMval) \ argument
124 "vmov.i8 " #QD ", #0x55" "\n\t" \
129 "vstmia %1, {" #QD "}\n\t" \
134 : #QD, #QM, "memory", "r4" \
146 "vmov.i8 " #QD ", #0x55" "\n\t" \
152 "vstmia %1, {" #QD "}\n\t" \
157 : #QD, #QM, "memory", "r4" \
164 #define TESTINSN_bin(instruction, QD, QM, QMtype, QMval, QN, QNtype, QNval) \ argument
169 "vmov.i8 " #QD ", #0x55" "\n\t" \
173 "vstmia %0, {" #QD "}\n\t" \
176 : #QD, #QM, #QN, "memory" \
202 #define TESTINSN_bin_f(instruction, QD, QM, QMtype, QMval, QN, QNtype, QNval) \ argument
207 "vdup.i32 " #QD ", %3\n\t" \
211 "vstmia %0, {" #QD "}\n\t" \
214 : #QD, #QM, #QN, "memory" \
225 "vdup.i32 " #QD ", %3\n\t" \
230 "vstmia %0, {" #QD "}\n\t" \
233 : #QD, #QM, #QN, "memory" \
240 #define TESTINSN_bin_q(instruction, QD, QM, QMtype, QMval, QN, QNtype, QNval) \ argument
246 "vmov.i8 " #QD ", #0x55" "\n\t" \
252 "vstmia %1, {" #QD "}\n\t" \
257 : #QD, #QM, #QN, "memory", "r4" \
269 "vmov.i8 " #QD ", #0x55" "\n\t" \
276 "vstmia %1, {" #QD "}\n\t" \
281 : #QD, #QM, #QN, "memory", "r4" \
334 #define TESTINSN_2reg_shift(instruction, QD, QM, QMtype, QMval, imm) \
339 "vmov.i8 " #QD ", #0x55" "\n\t" \
342 "vstmia %0, {" #QD "}\n\t" \
345 : #QD, #QM, "memory" \