Searched defs:CTRL (Results 1 – 8 of 8) sorted by relevance
25 volatile uint32_t CTRL; member
462 …__IO uint32_t CTRL; /*!< Offset: 0x000 (R/W) SysTick Control and Status Regist… member513 …__IO uint32_t CTRL; /*!< Offset: 0x004 (R/W) MPU Control Register … member
481 …__IO uint32_t CTRL; /*!< Offset: 0x000 (R/W) SysTick Control and Status Regist… member532 …__IO uint32_t CTRL; /*!< Offset: 0x004 (R/W) MPU Control Register … member
441 …__IO uint32_t CTRL; /*!< Offset: 0x000 (R/W) SysTick Control and Status Regist… member
592 …__IO uint32_t CTRL; /*!< Offset: 0x000 (R/W) SysTick Control and Status Regist… member743 …__IO uint32_t CTRL; /*!< Offset: 0x000 (R/W) Control Register … member1043 …__IO uint32_t CTRL; /*!< Offset: 0x004 (R/W) MPU Control Register … member
612 …__IO uint32_t CTRL; /*!< Offset: 0x000 (R/W) SysTick Control and Status Regist… member763 …__IO uint32_t CTRL; /*!< Offset: 0x000 (R/W) Control Register … member1063 …__IO uint32_t CTRL; /*!< Offset: 0x004 (R/W) MPU Control Register … member
652 …__IO uint32_t CTRL; /*!< Offset: 0x000 (R/W) SysTick Control and Status Regist… member803 …__IO uint32_t CTRL; /*!< Offset: 0x000 (R/W) Control Register … member1103 …__IO uint32_t CTRL; /*!< Offset: 0x004 (R/W) MPU Control Register … member
833 …__IO uint32_t CTRL; /*!< Offset: 0x000 (R/W) SysTick Control and Status Regist… member984 …__IO uint32_t CTRL; /*!< Offset: 0x000 (R/W) Control Register … member1287 …__IO uint32_t CTRL; /*!< Offset: 0x004 (R/W) MPU Control Register … member