| /art/compiler/optimizing/ |
| D | code_generator_mips.cc | 542 __ Move(TMP, r2); in EmitSwap() local
543 __ Move(r2, r1); in EmitSwap() local
544 __ Move(r1, TMP); in EmitSwap() local
566 __ Move(TMP, r2); in EmitSwap() local
573 __ Move(TMP, r2); in EmitSwap() local
574 __ Move(r2, r1); in EmitSwap() local
575 __ Move(r1, TMP); in EmitSwap() local
578 __ Move(TMP, r2); in EmitSwap() local
579 __ Move(r2, r1); in EmitSwap() local
580 __ Move(r1, TMP); in EmitSwap() local
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| D | intrinsics_mips.cc | 73 __ Move(V0, trg_reg); in MoveFromReturnRegister() local
1097 __ Move(out_lo, a_lo); in GenMinMax() local
1098 __ Move(out_hi, a_hi); in GenMinMax() local
1135 __ Move(out, a); in GenMinMax() local
1162 __ Move(out_lo, a_lo); in GenMinMax() local
1163 __ Move(out_hi, a_hi); in GenMinMax() local
1201 __ Move(out, a); in GenMinMax() local
1835 __ Move(out, value); // Use 'out' for the 'store conditional' instruction. in GenCas() local
2029 __ Move(TMP, str); in VisitStringEquals() local
2030 __ Move(temp3, arg); in VisitStringEquals() local
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| D | intrinsics_mips64.cc | 61 __ Move(V0, trg_reg); in MoveFromReturnRegister() local
581 __ Move(out, lhs); in GenMinMax() local
1245 __ Move(out, value); // Use 'out' for the 'store conditional' instruction. in GenCas() local
1439 __ Move(TMP, str); in VisitStringEquals() local
1440 __ Move(temp3, arg); in VisitStringEquals() local
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| D | code_generator_mips64.cc | 707 __ Move(destination.AsRegister<GpuRegister>(), source.AsRegister<GpuRegister>()); in MoveLocation() local
811 __ Move(TMP, r2); in SwapLocations() local
812 __ Move(r2, r1); in SwapLocations() local
813 __ Move(r1, TMP); in SwapLocations() local
849 __ Move(reg_loc.AsRegister<GpuRegister>(), TMP); in SwapLocations() local
1192 __ Move(dst, lhs); in HandleShift() local
1860 __ Move(out, ZERO); in DivRemOneOrMinusOne() local
1870 __ Move(out, dividend); in DivRemOneOrMinusOne() local
2869 __ Move(out, ZERO); in VisitInstanceOf() local
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| D | code_generator_x86_64.cc | 1123 void CodeGeneratorX86_64::Move(Location destination, Location source) { in Move() function in art::x86_64::CodeGeneratorX86_64
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| /art/compiler/jni/quick/ |
| D | jni_compiler.cc | 539 __ Move(out_reg, in_reg, mr_conv->CurrentParamSize()); in CopyParameter() local
601 __ Move(jni_conv->CurrentParamRegister(), in_reg, jni_conv->CurrentParamSize()); in SetNativeParameter() local
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| /art/compiler/utils/ |
| D | assembler.h | 121 void Move(size_t newposition, size_t oldposition, size_t size) { in Move() function
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| /art/compiler/utils/arm/ |
| D | assembler_arm.cc | 656 void ArmAssembler::Move(ManagedRegister m_dst, ManagedRegister m_src, size_t /*size*/) { in Move() function in art::arm::ArmAssembler
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| /art/compiler/utils/arm64/ |
| D | assembler_arm64.cc | 328 void Arm64Assembler::Move(ManagedRegister m_dst, ManagedRegister m_src, size_t size) { in Move() function in art::arm64::Arm64Assembler
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| /art/compiler/utils/mips64/ |
| D | assembler_mips64.cc | 1023 void Mips64Assembler::Move(GpuRegister rd, GpuRegister rs) { in Move() function in art::mips64::Mips64Assembler
2190 void Mips64Assembler::Move(ManagedRegister mdest, ManagedRegister msrc, size_t size) { in Move() function in art::mips64::Mips64Assembler
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| /art/compiler/utils/mips/ |
| D | assembler_mips.cc | 1331 void MipsAssembler::Move(Register rd, Register rs) { in Move() function in art::mips::MipsAssembler
2653 void MipsAssembler::Move(ManagedRegister mdest, ManagedRegister msrc, size_t size) { in Move() function in art::mips::MipsAssembler
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| D | assembler_mips_test.cc | 714 TEST_F(AssemblerMIPSTest, Move) { in TEST_F() argument
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| /art/compiler/utils/x86/ |
| D | assembler_x86.cc | 2174 void X86Assembler::Move(ManagedRegister mdest, ManagedRegister msrc, size_t size) { in Move() function in art::x86::X86Assembler
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| /art/compiler/utils/x86_64/ |
| D | assembler_x86_64.cc | 2928 void X86_64Assembler::Move(ManagedRegister mdest, ManagedRegister msrc, size_t size) { in Move() function in art::x86_64::X86_64Assembler
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