| /external/llvm/lib/Target/X86/Disassembler/ |
| D | X86Disassembler.cpp | 345 unsigned NewOpc; in translateImmediate() local
379 unsigned NewOpc; in translateImmediate() local
410 unsigned NewOpc; in translateImmediate() local
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| /external/llvm/lib/Target/ARM/ |
| D | ARMLoadStoreOptimizer.cpp | 1201 unsigned NewOpc = getUpdatingLSMultipleOpcode(Opcode, Mode); in MergeBaseUpdateLSMultiple() local
1301 unsigned NewOpc; in MergeBaseUpdateLoadStore() local
1397 unsigned NewOpc; in MergeBaseUpdateLSDouble() local
1492 DebugLoc DL, unsigned NewOpc, in InsertLDR_STR()
1557 unsigned NewOpc = (isLd) in FixInvalidRegPairOp() local
1579 unsigned NewOpc = (isLd) in FixInvalidRegPairOp() local
1816 unsigned NewOpc = (isThumb2 ? ARM::t2LDMIA_RET : ARM::LDMIA_RET); in MergeReturnIntoLDM() local
2008 DebugLoc &dl, unsigned &NewOpc, in CanFormLdStDWord()
2173 unsigned NewOpc = 0; in RescheduleOps() local
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| D | ARMExpandPseudoInsts.cpp | 848 unsigned NewOpc = AFI->isThumbFunction() ? ARM::t2MOVi16 : ARM::MOVi16; in ExpandMI() local
887 unsigned NewOpc; in ExpandMI() local
1131 unsigned NewOpc = ARM::VLDMDIA; in ExpandMI() local
1162 unsigned NewOpc = ARM::VSTMDIA; in ExpandMI() local
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| D | Thumb2InstrInfo.cpp | 497 unsigned NewOpc = isSub ? ARM::t2SUBri12 : ARM::t2ADDri12; in rewriteT2FrameIndex() local
531 unsigned NewOpc = Opcode; in rewriteT2FrameIndex() local
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| D | ThumbRegisterInfo.cpp | 398 unsigned NewOpc = convertToNonSPOpcode(Opcode); in rewriteFrameIndex() local
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| D | ARMISelLowering.cpp | 2825 unsigned NewOpc = (IntNo == Intrinsic::arm_neon_vmulls) in LowerINTRINSIC_WO_CHAIN() local
2832 unsigned NewOpc = (IntNo == Intrinsic::arm_neon_vminnm) in LowerINTRINSIC_WO_CHAIN() local
2841 unsigned NewOpc = (IntNo == Intrinsic::arm_neon_vminu) in LowerINTRINSIC_WO_CHAIN() local
2850 unsigned NewOpc = (IntNo == Intrinsic::arm_neon_vmins) in LowerINTRINSIC_WO_CHAIN() local
2855 unsigned NewOpc = (IntNo == Intrinsic::arm_neon_vmins) in LowerINTRINSIC_WO_CHAIN() local
6360 unsigned NewOpc = 0; in LowerMUL() local
7909 unsigned NewOpc = MI->getOpcode() == ARM::STRi_preidx ? in EmitInstrWithCustomInserter() local
7933 unsigned NewOpc; in EmitInstrWithCustomInserter() local
8184 unsigned NewOpc = convertAddSubFlagsOpcode(MI->getOpcode()); in AdjustInstrPostInstrSelection() local
9513 unsigned NewOpc = 0; in CombineBaseUpdate() local
[all …]
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| D | ARMConstantIslandPass.cpp | 1842 unsigned NewOpc = 0; in optimizeThumb2Instructions() local
1901 unsigned NewOpc = 0; in optimizeThumb2Branches() local
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| D | ARMISelDAGToDAG.cpp | 3057 unsigned NewOpc = isThumb ? (IsAcquire ? ARM::t2LDAEXD : ARM::t2LDREXD) in Select() local
3139 unsigned NewOpc = isThumb ? (IsRelease ? ARM::t2STLEXD : ARM::t2STREXD) in Select() local
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| /external/llvm/lib/Target/Mips/ |
| D | MipsInstrInfo.cpp | 278 MipsInstrInfo::genInstrWithNewOpc(unsigned NewOpc, in genInstrWithNewOpc()
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| D | MipsLongBranch.cpp | 219 unsigned NewOpc = TII->getOppositeBranchOpc(Br->getOpcode()); in replaceBranch() local
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| /external/llvm/lib/Target/AArch64/ |
| D | AArch64AdvSIMDScalarPass.cpp | 301 unsigned NewOpc = getTransformOpcode(OldOpc); in transformInstruction() local
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| D | AArch64LoadStoreOptimizer.cpp | 591 unsigned NewOpc = getMatchingPairOpcode(Opc); in mergePairedInsns() local
1062 unsigned NewOpc = IsPreIdx ? getPreIndexedOpcode(I->getOpcode()) in mergeUpdateInsn() local
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| D | AArch64InstrInfo.cpp | 840 unsigned NewOpc = convertFlagSettingOpcode(CmpInstr); in optimizeCompareInstr() local
873 unsigned NewOpc = MI->getOpcode(); in optimizeCompareInstr() local
2510 unsigned NewOpc = convertFlagSettingOpcode(&Root); in getMachineCombinerPatterns() local
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| /external/mesa3d/src/gallium/drivers/radeon/ |
| D | AMDILISelDAGToDAG.cpp | 166 unsigned int NewOpc = AMDGPU::COPY; in Select() local
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| /external/llvm/lib/Target/X86/ |
| D | X86MCInstLower.cpp | 478 unsigned NewOpc; in Lower() local
503 unsigned NewOpc; in Lower() local
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| D | X86InstrInfo.cpp | 5132 unsigned NewOpc; in optimizeCompareInstr() local
5933 unsigned NewOpc = 0; in foldMemoryOperandImpl() local
6067 unsigned NewOpc = 0; in foldMemoryOperandImpl() local
6250 unsigned NewOpc; in unfoldMemoryOperand() local
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| /external/llvm/lib/Target/Hexagon/ |
| D | HexagonGenPredicate.cpp | 370 unsigned NewOpc = getPredForm(Opc); in convertToPredForm() local
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| D | HexagonInstrInfo.cpp | 864 unsigned NewOpc = Is128B ? Hexagon::V6_vL32b_ai_128B in expandPostRAPseudo() local
878 unsigned NewOpc = Is128B ? Hexagon::V6_vS32b_ai_128B in expandPostRAPseudo() local
992 unsigned NewOpc = (Opc == Hexagon::TFRI_f) ? Hexagon::A2_tfrsi : in expandPostRAPseudo() local
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| D | HexagonBitSimplify.cpp | 2025 unsigned NewOpc = (W == 8) ? Hexagon::A2_zxtb in genExtractLow() local
2110 unsigned NewOpc = V.is(0) ? Hexagon::TFR_PdFalse : Hexagon::TFR_PdTrue; in simplifyTstbit() local
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| D | HexagonFrameLowering.cpp | 572 unsigned NewOpc = Hexagon::L4_return; in insertEpilogueInBlock() local
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| /external/llvm/lib/CodeGen/SelectionDAG/ |
| D | LegalizeVectorOps.cpp | 474 unsigned NewOpc; in PromoteFP_TO_INT() local
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| /external/llvm/lib/Target/X86/AsmParser/ |
| D | X86AsmParser.cpp | 2410 unsigned NewOpc; in processInstruction() local
2435 unsigned NewOpc; in processInstruction() local
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| /external/llvm/lib/CodeGen/ |
| D | MachineLICM.cpp | 1175 unsigned NewOpc = in ExtractHoistableLoad() local
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| D | TwoAddressInstructionPass.cpp | 1296 unsigned NewOpc = in tryInstructionTransform() local
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| /external/llvm/lib/Target/ARM/AsmParser/ |
| D | ARMAsmParser.cpp | 7844 unsigned NewOpc; in processInstruction() local
8326 unsigned NewOpc; in processInstruction() local
8441 unsigned NewOpc; in processInstruction() local
8481 unsigned NewOpc; in processInstruction() local
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