| /external/llvm/lib/Target/MSP430/ |
| D | MSP430ISelLowering.h | 65 SHL, SRA, SRL enumerator
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| /external/valgrind/none/tests/mips64/ |
| D | shift_instructions.c | 10 SRA, SRAV, SRL, SRLV enumerator
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| /external/llvm/lib/Target/PowerPC/ |
| D | PPCISelLowering.h | 94 SRL, SRA, SHL, enumerator
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| /external/llvm/lib/Target/SystemZ/ |
| D | SystemZSelectionDAGInfo.cpp | 179 SDValue SRL = DAG.getNode(ISD::SRL, DL, MVT::i32, IPM, in addIPMSequence() local
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| D | SystemZInstrInfo.cpp | 460 MachineInstr *SRL = getDef(RLL->getOperand(1).getReg(), MRI); in removeIPMBasedCompare() local
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| /external/llvm/include/llvm/CodeGen/ |
| D | ISDOpcodes.h | 336 SHL, SRA, SRL, ROTL, ROTR, enumerator
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| /external/pcre/dist/sljit/ |
| D | sljitNativeSPARC_common.c | 154 #define SRL (OPC1(0x2) | OPC3(0x26)) macro
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| D | sljitNativeMIPS_common.c | 167 #define SRL (HI(0) | LO(2)) macro
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| /external/llvm/include/llvm/TableGen/ |
| D | Record.h | 727 enum BinaryOp { ADD, AND, SHL, SRA, SRL, LISTCONCAT, STRCONCAT, CONCAT, EQ }; enumerator
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| /external/v8/src/mips/ |
| D | constants-mips.h | 400 SRL = ((0U << 3) + 2), enumerator
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| /external/v8/src/mips64/ |
| D | constants-mips64.h | 396 SRL = ((0U << 3) + 2), enumerator
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| /external/llvm/lib/Target/Mips/ |
| D | MipsISelLowering.cpp | 2241 SDValue SRL = DAG.getNode(ISD::SRL, DL, MVT::i64, SLL, Const32); in lowerLOAD() local
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| /external/llvm/lib/CodeGen/SelectionDAG/ |
| D | DAGCombiner.cpp | 2281 SDValue SRL = in visitSDIV() local
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| /external/llvm/lib/Target/X86/ |
| D | X86ISelLowering.cpp | 18392 SDValue SRL = getTargetVShiftByConstNode(X86ISD::VSRLI, dl, ShiftVT, in LowerScalarImmediateShift() local
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