/external/llvm/lib/Target/Hexagon/ |
D | HexagonMachineScheduler.cpp | 43 bool VLIWResourceModel::isResourceAvailable(SUnit *SU) { in isResourceAvailable() 83 bool VLIWResourceModel::reserveResources(SUnit *SU) { in reserveResources() 184 SUnit *SU = SchedImpl->pickNode(IsTopNode); in schedule() local 228 void ConvergingVLIWScheduler::releaseTopNode(SUnit *SU) { in releaseTopNode() 245 void ConvergingVLIWScheduler::releaseBottomNode(SUnit *SU) { in releaseBottomNode() 277 bool ConvergingVLIWScheduler::VLIWSchedBoundary::checkHazard(SUnit *SU) { in checkHazard() 288 void ConvergingVLIWScheduler::VLIWSchedBoundary::releaseNode(SUnit *SU, in releaseNode() 329 void ConvergingVLIWScheduler::VLIWSchedBoundary::bumpNode(SUnit *SU) { in bumpNode() 367 SUnit *SU = *(Pending.begin()+i); in releasePending() local 387 void ConvergingVLIWScheduler::VLIWSchedBoundary::removeReady(SUnit *SU) { in removeReady() [all …]
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/external/llvm/lib/CodeGen/SelectionDAG/ |
D | ResourcePriorityQueue.cpp | 70 ResourcePriorityQueue::numberRCValPredInSU(SUnit *SU, unsigned RCId) { in numberRCValPredInSU() 107 unsigned ResourcePriorityQueue::numberRCValSuccInSU(SUnit *SU, in numberRCValSuccInSU() 145 static unsigned numberCtrlDepsInSU(SUnit *SU) { in numberCtrlDepsInSU() 155 static unsigned numberCtrlPredInSU(SUnit *SU) { in numberCtrlPredInSU() 173 SUnit *SU = &(*SUnits)[i]; in initNodes() local 215 SUnit *ResourcePriorityQueue::getSingleUnscheduledPred(SUnit *SU) { in getSingleUnscheduledPred() 231 void ResourcePriorityQueue::push(SUnit *SU) { in push() 246 bool ResourcePriorityQueue::isResourceAvailable(SUnit *SU) { in isResourceAvailable() 289 void ResourcePriorityQueue::reserveResources(SUnit *SU) { in reserveResources() 326 signed ResourcePriorityQueue::rawRegPressureDelta(SUnit *SU, unsigned RCId) { in rawRegPressureDelta() [all …]
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D | ScheduleDAGRRList.cpp | 186 bool IsReachable(const SUnit *SU, const SUnit *TargetSU) { in IsReachable() 192 bool WillCreateCycle(SUnit *SU, SUnit *TargetSU) { in WillCreateCycle() 199 void AddPred(SUnit *SU, const SDep &D) { in AddPred() 207 void RemovePred(SUnit *SU, const SDep &D) { in RemovePred() 213 bool isReady(SUnit *SU) { in isReady() 365 void ScheduleDAGRRList::ReleasePred(SUnit *SU, const SDep *PredEdge) { in ReleasePred() 525 void ScheduleDAGRRList::ReleasePredecessors(SUnit *SU) { in ReleasePredecessors() 622 void ScheduleDAGRRList::AdvancePastStalls(SUnit *SU) { in AdvancePastStalls() 664 void ScheduleDAGRRList::EmitNode(SUnit *SU) { in EmitNode() 706 void ScheduleDAGRRList::ScheduleNodeBottomUp(SUnit *SU) { in ScheduleNodeBottomUp() [all …]
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D | ScheduleDAGVLIW.cpp | 116 void ScheduleDAGVLIW::releaseSucc(SUnit *SU, const SDep &D) { in releaseSucc() 140 void ScheduleDAGVLIW::releaseSuccessors(SUnit *SU) { in releaseSuccessors() 154 void ScheduleDAGVLIW::scheduleNodeTopDown(SUnit *SU, unsigned CurCycle) { in scheduleNodeTopDown()
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D | ScheduleDAGSDNodes.cpp | 78 SUnit *SU = &SUnits.back(); in newSUnit() local 90 SUnit *SU = newSUnit(Old->getNode()); in Clone() local 406 SUnit *SU = CallSUnits.pop_back_val(); in BuildSchedUnits() local 427 SUnit *SU = &SUnits[su]; in AddSchedEdges() local 558 ScheduleDAGSDNodes::RegDefIter::RegDefIter(const SUnit *SU, in RegDefIter() 583 void ScheduleDAGSDNodes::InitNumRegDefsLeft(SUnit *SU) { in InitNumRegDefsLeft() 591 void ScheduleDAGSDNodes::computeLatency(SUnit *SU) { in computeLatency() 676 if (SUnit *SU = Sequence[i]) in dumpSchedule() local 758 EmitPhysRegCopy(SUnit *SU, DenseMap<SUnit*, unsigned> &VRBaseMap, in EmitPhysRegCopy() argument 818 SUnit *SU = Sequence[i]; in EmitSchedule() local
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D | ScheduleDAGFast.cpp | 88 void AddPred(SUnit *SU, const SDep &D) { in AddPred() 94 void RemovePred(SUnit *SU, const SDep &D) { in RemovePred() 140 void ScheduleDAGFast::ReleasePred(SUnit *SU, SDep *PredEdge) { in ReleasePred() 161 void ScheduleDAGFast::ReleasePredecessors(SUnit *SU, unsigned CurCycle) { in ReleasePredecessors() 183 void ScheduleDAGFast::ScheduleNodeBottomUp(SUnit *SU, unsigned CurCycle) { in ScheduleNodeBottomUp() 213 SUnit *ScheduleDAGFast::CopyAndMoveSuccessors(SUnit *SU) { in CopyAndMoveSuccessors() 387 void ScheduleDAGFast::InsertCopiesAndMoveSuccs(SUnit *SU, unsigned Reg, in InsertCopiesAndMoveSuccs() 454 static bool CheckForLiveRegDef(SUnit *SU, unsigned Reg, in CheckForLiveRegDef() 475 bool ScheduleDAGFast::DelayForLiveRegsBottomUp(SUnit *SU, in DelayForLiveRegsBottomUp()
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/external/llvm/lib/Target/AMDGPU/ |
D | R600MachineScheduler.cpp | 58 SUnit *SU = nullptr; in pickNode() local 144 void R600SchedStrategy::schedNode(SUnit *SU, bool IsTopNode) { in schedNode() 192 void R600SchedStrategy::releaseTopNode(SUnit *SU) { in releaseTopNode() 196 void R600SchedStrategy::releaseBottomNode(SUnit *SU) { in releaseBottomNode() 296 int R600SchedStrategy::getInstKind(SUnit* SU) { in getInstKind() 325 SUnit *SU = *It; in PopInst() local 435 SUnit *SU = AttemptFillSlot(3, true); in pickAlu() local 444 SUnit *SU = AttemptFillSlot(Chan, false); in pickAlu() local 458 SUnit *SU = nullptr; in pickOther() local
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/external/llvm/lib/CodeGen/ |
D | LatencyPriorityQueue.cpp | 56 SUnit *LatencyPriorityQueue::getSingleUnscheduledPred(SUnit *SU) { in getSingleUnscheduledPred() 73 void LatencyPriorityQueue::push(SUnit *SU) { in push() 92 void LatencyPriorityQueue::scheduledNode(SUnit *SU) { in scheduledNode() 105 void LatencyPriorityQueue::AdjustPriorityOfUnscheduledPreds(SUnit *SU) { in AdjustPriorityOfUnscheduledPreds() 134 void LatencyPriorityQueue::remove(SUnit *SU) { in remove()
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D | MachineScheduler.cpp | 542 void ScheduleDAGMI::releaseSucc(SUnit *SU, SDep *SuccEdge) { in releaseSucc() 570 void ScheduleDAGMI::releaseSuccessors(SUnit *SU) { in releaseSuccessors() 581 void ScheduleDAGMI::releasePred(SUnit *SU, SDep *PredEdge) { in releasePred() 609 void ScheduleDAGMI::releasePredecessors(SUnit *SU) { in releasePredecessors() 693 SUnit *SU = SchedImpl->pickNode(IsTopNode); in schedule() local 753 SUnit *SU = &(*I); in findRootsAndBiasEdges() local 801 void ScheduleDAGMI::updateQueues(SUnit *SU, bool IsTopNode) { in updateQueues() 837 if (SUnit *SU = getSUnit(&(*MI))) in dumpSchedule() local 944 updateScheduledPressure(const SUnit *SU, in updateScheduledPressure() 998 SUnit *SU = V2SU.SU; in updatePressureDiffs() local [all …]
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D | ScheduleDAG.cpp | 183 SUnit *SU = WorkList.pop_back_val(); in setDepthDirty() local 199 SUnit *SU = WorkList.pop_back_val(); in setHeightDirty() local 471 SUnit *SU = &SUnits[i]; in InitDAGTopologicalSorting() local 487 SUnit *SU = WorkList.back(); in InitDAGTopologicalSorting() local 493 SUnit *SU = I->getSUnit(); in InitDAGTopologicalSorting() local 506 SUnit *SU = &SUnits[i]; in InitDAGTopologicalSorting() local 544 void ScheduleDAGTopologicalSort::DFS(const SUnit *SU, int UpperBound, in DFS() 601 bool ScheduleDAGTopologicalSort::WillCreateCycle(SUnit *TargetSU, SUnit *SU) { in WillCreateCycle() 614 bool ScheduleDAGTopologicalSort::IsReachable(const SUnit *SU, in IsReachable()
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D | PostRASchedulerList.cpp | 245 if (SUnit *SU = Sequence[i]) in dumpSchedule() local 438 void SchedulePostRATDList::ReleaseSucc(SUnit *SU, SDep *SuccEdge) { in ReleaseSucc() 473 void SchedulePostRATDList::ReleaseSuccessors(SUnit *SU) { in ReleaseSuccessors() 483 void SchedulePostRATDList::ScheduleNodeTopDown(SUnit *SU, unsigned CurCycle) { in ScheduleNodeTopDown() 662 if (SUnit *SU = Sequence[i]) in EmitSchedule() local
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D | ScheduleDAGInstrs.cpp | 247 void ScheduleDAGInstrs::addPhysRegDataDeps(SUnit *SU, unsigned OperIdx) { in addPhysRegDataDeps() 290 void ScheduleDAGInstrs::addPhysRegDeps(SUnit *SU, unsigned OperIdx) { in addPhysRegDeps() 385 void ScheduleDAGInstrs::addVRegDefDeps(SUnit *SU, unsigned OperIdx) { in addVRegDefDeps() 494 void ScheduleDAGInstrs::addVRegUseDeps(SUnit *SU, unsigned OperIdx) { in addVRegUseDeps() 686 const DataLayout &DL, SUnit *SU, SUnit *ExitSU, in adjustChainDeps() 760 SUnit *SU = newSUnit(MI); in initSUnits() local 797 void ScheduleDAGInstrs::collectVRegUses(SUnit *SU) { in collectVRegUses() 895 SUnit *SU = MISUnitMap[MI]; in buildSchedGraph() local 1414 void visitPreorder(const SUnit *SU) { in visitPreorder() 1422 void visitPostorderNode(const SUnit *SU) { in visitPostorderNode() [all …]
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D | ScoreboardHazardRecognizer.cpp | 119 ScoreboardHazardRecognizer::getHazardType(SUnit *SU, int Stalls) { in getHazardType() 179 void ScoreboardHazardRecognizer::EmitInstruction(SUnit *SU) { in EmitInstruction()
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D | CriticalAntiDepBreaker.cpp | 129 static const SDep *CriticalPathStep(const SUnit *SU) { in CriticalPathStep() 440 const SUnit *SU = &SUnits[i]; in BreakAntiDependencies() local 645 const SUnit *SU = MISUnitMap[Q->second->getParent()]; in BreakAntiDependencies() local
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D | AggressiveAntiDepBreaker.cpp | 253 static void AntiDepEdges(const SUnit *SU, std::vector<const SDep*>& Edges) { in AntiDepEdges() 266 static const SUnit *CriticalPathStep(const SUnit *SU) { in CriticalPathStep() 755 const SUnit *SU = &SUnits[i]; in BreakAntiDependencies() local 767 const SUnit *SU = &SUnits[i]; in BreakAntiDependencies() local 936 const SUnit *SU = MISUnitMap[Q.second.Operand->getParent()]; in BreakAntiDependencies() local
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D | ScheduleDAGPrinter.cpp | 80 std::string DOTGraphTraits<ScheduleDAG*>::getNodeLabel(const SUnit *SU, in getNodeLabel()
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/external/llvm/lib/Target/PowerPC/ |
D | PPCHazardRecognizers.cpp | 26 bool PPCDispatchGroupSBHazardRecognizer::isLoadAfterStore(SUnit *SU) { in isLoadAfterStore() 56 bool PPCDispatchGroupSBHazardRecognizer::isBCTRAfterSet(SUnit *SU) { in isBCTRAfterSet() 141 PPCDispatchGroupSBHazardRecognizer::getHazardType(SUnit *SU, int Stalls) { in getHazardType() 148 bool PPCDispatchGroupSBHazardRecognizer::ShouldPreferAnother(SUnit *SU) { in ShouldPreferAnother() 157 unsigned PPCDispatchGroupSBHazardRecognizer::PreEmitNoops(SUnit *SU) { in PreEmitNoops() 175 void PPCDispatchGroupSBHazardRecognizer::EmitInstruction(SUnit *SU) { in EmitInstruction() 325 getHazardType(SUnit *SU, int Stalls) { in getHazardType() 385 void PPCHazardRecognizer970::EmitInstruction(SUnit *SU) { in EmitInstruction()
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/external/llvm/lib/Target/ARM/ |
D | ARMHazardRecognizer.cpp | 35 ARMHazardRecognizer::getHazardType(SUnit *SU, int Stalls) { in getHazardType() 83 void ARMHazardRecognizer::EmitInstruction(SUnit *SU) { in EmitInstruction()
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/external/llvm/include/llvm/CodeGen/ |
D | LatencyPriorityQueue.h | 57 void addNode(const SUnit *SU) override { in addNode() 61 void updateNode(const SUnit *SU) override { in updateNode()
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D | MachineScheduler.h | 421 PressureDiff &getPressureDiff(const SUnit *SU) { in getPressureDiff() 497 bool isInQueue(SUnit *SU) const { return (SU->NodeQueueId & ID); } in isInQueue() 513 iterator find(SUnit *SU) { in find() 517 void push(SUnit *SU) { in push() 668 bool isNextSU(const SUnit *SU) const { return NextSUs.count(SU); } in isNextSU() 680 unsigned getUnscheduledLatency(SUnit *SU) const { in getUnscheduledLatency() 799 SUnit *SU; member 883 void releaseTopNode(SUnit *SU) override { in releaseTopNode() 887 void releaseBottomNode(SUnit *SU) override { in releaseBottomNode() 947 void releaseTopNode(SUnit *SU) override { in releaseTopNode() [all …]
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D | ScheduleDFS.h | 146 unsigned getNumInstrs(const SUnit *SU) const { in getNumInstrs() 159 ILPValue getILP(const SUnit *SU) const { in getILP() 170 unsigned getSubtreeID(const SUnit *SU) const { in getSubtreeID()
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D | ResourcePriorityQueue.h | 84 void addNode(const SUnit *SU) override { in addNode() 88 void updateNode(const SUnit *SU) override {} in updateNode()
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D | ScheduleDAGInstrs.h | 36 SUnit *SU; member 58 SUnit *SU; member 179 const MCSchedClassDesc *getSchedClass(SUnit *SU) const { in getSchedClass()
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D | ScheduleDAG.h | 165 void setSUnit(SUnit *SU) { in setSUnit()
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/external/clang/lib/StaticAnalyzer/Core/ |
D | SimpleConstraintManager.h | 25 SubEngine *SU; variable
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