/art/compiler/utils/mips/ |
D | assembler_mips_test.cc | 1147 TEST_F(AssemblerMIPSTest, StoreSToOffset) { in TEST_F() argument 1148 __ StoreSToOffset(mips::F0, mips::A0, 0); in TEST_F() local 1149 __ StoreSToOffset(mips::F0, mips::A0, 4); in TEST_F() local 1150 __ StoreSToOffset(mips::F0, mips::A0, 256); in TEST_F() local 1151 __ StoreSToOffset(mips::F0, mips::A0, 0x8000); in TEST_F() local 1152 __ StoreSToOffset(mips::F0, mips::A0, 0x10000); in TEST_F() local 1153 __ StoreSToOffset(mips::F0, mips::A0, 0x12345678); in TEST_F() local 1154 __ StoreSToOffset(mips::F0, mips::A0, -256); in TEST_F() local 1155 __ StoreSToOffset(mips::F0, mips::A0, 0xFFFF8000); in TEST_F() local 1156 __ StoreSToOffset(mips::F0, mips::A0, 0xABCDEF00); in TEST_F() local
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D | assembler_mips.cc | 2398 void MipsAssembler::StoreSToOffset(FRegister reg, Register base, int32_t offset) { in StoreSToOffset() function in art::mips::MipsAssembler
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/art/compiler/optimizing/ |
D | code_generator_arm.cc | 753 __ StoreSToOffset(static_cast<SRegister>(reg_id), SP, stack_index); in SaveFloatingPointRegister() local 1092 __ StoreSToOffset(source.AsFpuRegister<SRegister>(), SP, destination.GetStackIndex()); in Move32() local 3874 __ StoreSToOffset(value.AsFpuRegister<SRegister>(), base, offset); in HandleFieldSet() local 4702 __ StoreSToOffset(value.AsFpuRegister<SRegister>(), array, offset); in VisitArraySet() local 4705 __ StoreSToOffset(value.AsFpuRegister<SRegister>(), IP, data_offset); in VisitArraySet() local 4884 __ StoreSToOffset(source.AsFpuRegister<SRegister>(), SP, destination.GetStackIndex()); in EmitMove() local
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D | code_generator_mips.cc | 851 __ StoreSToOffset(source.AsFpuRegister<FRegister>(), SP, destination.GetStackIndex()); in Move32() local 1929 __ StoreSToOffset(value, obj, offset); in VisitArraySet() local 1933 __ StoreSToOffset(value, TMP, data_offset); in VisitArraySet() local 3619 __ StoreSToOffset(src, obj, offset); in HandleFieldSet() local
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/art/compiler/utils/arm64/ |
D | assembler_arm64.cc | 119 void Arm64Assembler::StoreSToOffset(SRegister source, XRegister base, int32_t offset) { in StoreSToOffset() function in art::arm64::Arm64Assembler
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/art/compiler/utils/arm/ |
D | assembler_arm32.cc | 1580 void Arm32Assembler::StoreSToOffset(SRegister reg, in StoreSToOffset() function in art::arm::Arm32Assembler
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D | assembler_thumb2.cc | 3789 void Thumb2Assembler::StoreSToOffset(SRegister reg, in StoreSToOffset() function in art::arm::Thumb2Assembler
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