1 // Copyright 2014 the V8 project authors. All rights reserved.
2 // Use of this source code is governed by a BSD-style license that can be
3 // found in the LICENSE file.
4
5 #if V8_TARGET_ARCH_PPC
6
7 #include "src/codegen.h"
8 #include "src/ic/ic.h"
9 #include "src/ic/stub-cache.h"
10 #include "src/interface-descriptors.h"
11
12 namespace v8 {
13 namespace internal {
14
15 #define __ ACCESS_MASM(masm)
16
17
ProbeTable(Isolate * isolate,MacroAssembler * masm,Code::Kind ic_kind,Code::Flags flags,StubCache::Table table,Register receiver,Register name,Register offset,Register scratch,Register scratch2,Register offset_scratch)18 static void ProbeTable(Isolate* isolate, MacroAssembler* masm,
19 Code::Kind ic_kind, Code::Flags flags,
20 StubCache::Table table, Register receiver, Register name,
21 // Number of the cache entry, not scaled.
22 Register offset, Register scratch, Register scratch2,
23 Register offset_scratch) {
24 ExternalReference key_offset(isolate->stub_cache()->key_reference(table));
25 ExternalReference value_offset(isolate->stub_cache()->value_reference(table));
26 ExternalReference map_offset(isolate->stub_cache()->map_reference(table));
27
28 uintptr_t key_off_addr = reinterpret_cast<uintptr_t>(key_offset.address());
29 uintptr_t value_off_addr =
30 reinterpret_cast<uintptr_t>(value_offset.address());
31 uintptr_t map_off_addr = reinterpret_cast<uintptr_t>(map_offset.address());
32
33 // Check the relative positions of the address fields.
34 DCHECK(value_off_addr > key_off_addr);
35 DCHECK((value_off_addr - key_off_addr) % 4 == 0);
36 DCHECK((value_off_addr - key_off_addr) < (256 * 4));
37 DCHECK(map_off_addr > key_off_addr);
38 DCHECK((map_off_addr - key_off_addr) % 4 == 0);
39 DCHECK((map_off_addr - key_off_addr) < (256 * 4));
40
41 Label miss;
42 Register base_addr = scratch;
43 scratch = no_reg;
44
45 // Multiply by 3 because there are 3 fields per entry (name, code, map).
46 __ ShiftLeftImm(offset_scratch, offset, Operand(1));
47 __ add(offset_scratch, offset, offset_scratch);
48
49 // Calculate the base address of the entry.
50 __ mov(base_addr, Operand(key_offset));
51 #if V8_TARGET_ARCH_PPC64
52 DCHECK(kPointerSizeLog2 > StubCache::kCacheIndexShift);
53 __ ShiftLeftImm(offset_scratch, offset_scratch,
54 Operand(kPointerSizeLog2 - StubCache::kCacheIndexShift));
55 #else
56 DCHECK(kPointerSizeLog2 == StubCache::kCacheIndexShift);
57 #endif
58 __ add(base_addr, base_addr, offset_scratch);
59
60 // Check that the key in the entry matches the name.
61 __ LoadP(ip, MemOperand(base_addr, 0));
62 __ cmp(name, ip);
63 __ bne(&miss);
64
65 // Check the map matches.
66 __ LoadP(ip, MemOperand(base_addr, map_off_addr - key_off_addr));
67 __ LoadP(scratch2, FieldMemOperand(receiver, HeapObject::kMapOffset));
68 __ cmp(ip, scratch2);
69 __ bne(&miss);
70
71 // Get the code entry from the cache.
72 Register code = scratch2;
73 scratch2 = no_reg;
74 __ LoadP(code, MemOperand(base_addr, value_off_addr - key_off_addr));
75
76 // Check that the flags match what we're looking for.
77 Register flags_reg = base_addr;
78 base_addr = no_reg;
79 __ lwz(flags_reg, FieldMemOperand(code, Code::kFlagsOffset));
80
81 DCHECK(!r0.is(flags_reg));
82 __ li(r0, Operand(Code::kFlagsNotUsedInLookup));
83 __ andc(flags_reg, flags_reg, r0);
84 __ mov(r0, Operand(flags));
85 __ cmpl(flags_reg, r0);
86 __ bne(&miss);
87
88 #ifdef DEBUG
89 if (FLAG_test_secondary_stub_cache && table == StubCache::kPrimary) {
90 __ b(&miss);
91 } else if (FLAG_test_primary_stub_cache && table == StubCache::kSecondary) {
92 __ b(&miss);
93 }
94 #endif
95
96 // Jump to the first instruction in the code stub.
97 __ addi(r0, code, Operand(Code::kHeaderSize - kHeapObjectTag));
98 __ mtctr(r0);
99 __ bctr();
100
101 // Miss: fall through.
102 __ bind(&miss);
103 }
104
105
GenerateProbe(MacroAssembler * masm,Code::Kind ic_kind,Code::Flags flags,Register receiver,Register name,Register scratch,Register extra,Register extra2,Register extra3)106 void StubCache::GenerateProbe(MacroAssembler* masm, Code::Kind ic_kind,
107 Code::Flags flags, Register receiver,
108 Register name, Register scratch, Register extra,
109 Register extra2, Register extra3) {
110 Isolate* isolate = masm->isolate();
111 Label miss;
112
113 #if V8_TARGET_ARCH_PPC64
114 // Make sure that code is valid. The multiplying code relies on the
115 // entry size being 24.
116 DCHECK(sizeof(Entry) == 24);
117 #else
118 // Make sure that code is valid. The multiplying code relies on the
119 // entry size being 12.
120 DCHECK(sizeof(Entry) == 12);
121 #endif
122
123 // Make sure the flags does not name a specific type.
124 DCHECK(Code::ExtractTypeFromFlags(flags) == 0);
125
126 // Make sure that there are no register conflicts.
127 DCHECK(!AreAliased(receiver, name, scratch, extra, extra2, extra3));
128
129 // Check scratch, extra and extra2 registers are valid.
130 DCHECK(!scratch.is(no_reg));
131 DCHECK(!extra.is(no_reg));
132 DCHECK(!extra2.is(no_reg));
133 DCHECK(!extra3.is(no_reg));
134
135 #ifdef DEBUG
136 // If vector-based ics are in use, ensure that scratch, extra, extra2 and
137 // extra3 don't conflict with the vector and slot registers, which need
138 // to be preserved for a handler call or miss.
139 if (IC::ICUseVector(ic_kind)) {
140 Register vector, slot;
141 if (ic_kind == Code::STORE_IC || ic_kind == Code::KEYED_STORE_IC) {
142 vector = VectorStoreICDescriptor::VectorRegister();
143 slot = VectorStoreICDescriptor::SlotRegister();
144 } else {
145 vector = LoadWithVectorDescriptor::VectorRegister();
146 slot = LoadWithVectorDescriptor::SlotRegister();
147 }
148 DCHECK(!AreAliased(vector, slot, scratch, extra, extra2, extra3));
149 }
150 #endif
151
152 Counters* counters = masm->isolate()->counters();
153 __ IncrementCounter(counters->megamorphic_stub_cache_probes(), 1, extra2,
154 extra3);
155
156 // Check that the receiver isn't a smi.
157 __ JumpIfSmi(receiver, &miss);
158
159 // Get the map of the receiver and compute the hash.
160 __ lwz(scratch, FieldMemOperand(name, Name::kHashFieldOffset));
161 __ LoadP(ip, FieldMemOperand(receiver, HeapObject::kMapOffset));
162 __ add(scratch, scratch, ip);
163 __ xori(scratch, scratch, Operand(flags));
164 // The mask omits the last two bits because they are not part of the hash.
165 __ andi(scratch, scratch,
166 Operand((kPrimaryTableSize - 1) << kCacheIndexShift));
167
168 // Probe the primary table.
169 ProbeTable(isolate, masm, ic_kind, flags, kPrimary, receiver, name, scratch,
170 extra, extra2, extra3);
171
172 // Primary miss: Compute hash for secondary probe.
173 __ sub(scratch, scratch, name);
174 __ addi(scratch, scratch, Operand(flags));
175 __ andi(scratch, scratch,
176 Operand((kSecondaryTableSize - 1) << kCacheIndexShift));
177
178 // Probe the secondary table.
179 ProbeTable(isolate, masm, ic_kind, flags, kSecondary, receiver, name, scratch,
180 extra, extra2, extra3);
181
182 // Cache miss: Fall-through and let caller handle the miss by
183 // entering the runtime system.
184 __ bind(&miss);
185 __ IncrementCounter(counters->megamorphic_stub_cache_misses(), 1, extra2,
186 extra3);
187 }
188
189
190 #undef __
191 } // namespace internal
192 } // namespace v8
193
194 #endif // V8_TARGET_ARCH_PPC
195