| /art/compiler/utils/mips64/ |
| D | assembler_mips64_test.cc | 85 registers_.push_back(new mips64::GpuRegister(mips64::A0)); in SetUpHelpers()
118 secondary_register_names_.emplace(mips64::GpuRegister(mips64::A0), "a0"); in SetUpHelpers()
217 (Base::GetAssembler()->*f)(mips64::A0, &label); in BranchCondOneRegHelper()
246 (Base::GetAssembler()->*f)(mips64::A0, mips64::A1, &label); in BranchCondTwoRegsHelper()
788 __ Beqc(mips64::A0, mips64::A1, &label); in TEST_F()
1008 __ LoadFromOffset(mips64::kLoadSignedByte, mips64::A0, mips64::A0, 0); in TEST_F()
1009 __ LoadFromOffset(mips64::kLoadSignedByte, mips64::A0, mips64::A1, 0); in TEST_F()
1010 __ LoadFromOffset(mips64::kLoadSignedByte, mips64::A0, mips64::A1, 1); in TEST_F()
1011 __ LoadFromOffset(mips64::kLoadSignedByte, mips64::A0, mips64::A1, 256); in TEST_F()
1012 __ LoadFromOffset(mips64::kLoadSignedByte, mips64::A0, mips64::A1, 1000); in TEST_F()
[all …]
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| D | assembler_mips64.cc | 2463 Move(A0, exception->scratch_.AsGpuRegister()); in EmitExceptionPoll()
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| /art/compiler/utils/mips/ |
| D | assembler_mips_test.cc | 61 registers_.push_back(new mips::Register(mips::A0)); in SetUpHelpers()
94 secondary_register_names_.emplace(mips::Register(mips::A0), "a0"); in SetUpHelpers()
193 (Base::GetAssembler()->*f)(mips::A0, &label); in BranchCondOneRegHelper()
222 (Base::GetAssembler()->*f)(mips::A0, mips::A1, &label); in BranchCondTwoRegsHelper()
727 __ LoadFromOffset(mips::kLoadSignedByte, mips::A0, mips::A0, 0); in TEST_F()
728 __ LoadFromOffset(mips::kLoadSignedByte, mips::A0, mips::A1, 0); in TEST_F()
729 __ LoadFromOffset(mips::kLoadSignedByte, mips::A0, mips::A1, 256); in TEST_F()
730 __ LoadFromOffset(mips::kLoadSignedByte, mips::A0, mips::A1, 1000); in TEST_F()
731 __ LoadFromOffset(mips::kLoadSignedByte, mips::A0, mips::A1, 0x8000); in TEST_F()
732 __ LoadFromOffset(mips::kLoadSignedByte, mips::A0, mips::A1, 0x10000); in TEST_F()
[all …]
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| D | assembler_mips.cc | 2911 Move(A0, exception->scratch_.AsCoreRegister()); in EmitExceptionPoll()
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| /art/compiler/jni/quick/mips/ |
| D | calling_convention_mips.cc | 26 static const Register kCoreArgumentRegisters[] = { A0, A1, A2, A3 };
68 return MipsManagedRegister::FromCoreRegister(A0); in MethodRegister()
223 A0, A1, A2, A3
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| /art/compiler/trampolines/ |
| D | trampoline_compiler.cc | 127 __ LoadFromOffset(kLoadWord, T9, A0, offset.Int32Value()); in CreateTrampoline()
130 __ LoadFromOffset(kLoadWord, T9, A0, JNIEnvExt::SelfOffset(4).Int32Value()); in CreateTrampoline()
159 __ LoadFromOffset(kLoadDoubleword, T9, A0, offset.Int32Value()); in CreateTrampoline()
162 __ LoadFromOffset(kLoadDoubleword, T9, A0, JNIEnvExt::SelfOffset(8).Int32Value()); in CreateTrampoline()
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| /art/runtime/arch/mips64/ |
| D | context_mips64.cc | 32 gprs_[A0] = &arg0_; in Reset()
76 gprs_[A0] = nullptr; in SmashCallerSaves()
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| D | registers_mips64.h | 34 A0 = 4, // Arguments. enumerator
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| D | context_mips64.h | 82 SetGPR(A0, new_arg0_value); in SetArg0()
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| /art/compiler/jni/quick/mips64/ |
| D | calling_convention_mips64.cc | 27 A0, A1, A2, A3, A4, A5, A6, A7
68 return Mips64ManagedRegister::FromGpuRegister(A0); in MethodRegister()
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| /art/runtime/arch/mips/ |
| D | registers_mips.h | 34 A0 = 4, // Arguments. enumerator
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| D | context_mips.h | 82 SetGPR(A0, new_arg0_value); in SetArg0()
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| D | context_mips.cc | 32 gprs_[A0] = &arg0_; in Reset()
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| D | quick_entrypoints_mips.S | 665 li $t3, 2 # t3 = gpr_index = 2 (skip A0 and A1)
790 li $t3, 1 # t3 = gpr_index = 1 (skip A0)
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| /art/compiler/optimizing/ |
| D | code_generator_mips64.h | 44 { A0, A1, A2, A3, A4, A5, A6, A7 };
113 return Location::RegisterLocation(A0); in GetFieldIndexLocation()
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| D | code_generator_mips.h | 44 { A0, A1, A2, A3 };
113 return Location::RegisterLocation(A0); in GetFieldIndexLocation()
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| D | optimizing_cfi_test.cc | 205 __ Beqz(mips::A0, &target); in TEST_F()
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| D | intrinsics_mips64.cc | 104 Location::RegisterLocation(A0)); in EmitNativeCode()
106 codegen->GenerateVirtualCall(invoke_->AsInvokeVirtual(), Location::RegisterLocation(A0)); in EmitNativeCode()
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| D | intrinsics_mips.cc | 115 Location::RegisterLocation(A0)); in EmitNativeCode()
117 codegen->GenerateVirtualCall(invoke_->AsInvokeVirtual(), Location::RegisterLocation(A0)); in EmitNativeCode()
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| D | code_generator_mips64.cc | 38 static constexpr GpuRegister kMethodRegisterArgument = A0;
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| D | code_generator_mips.cc | 40 static constexpr Register kMethodRegisterArgument = A0;
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