Searched refs:A3 (Results 1 – 12 of 12) sorted by relevance
/art/runtime/arch/mips/ |
D | registers_mips.h | 37 A3 = 7, enumerator
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D | quick_method_frame_info_mips.h | 34 (1 << art::mips::A1) | (1 << art::mips::A2) | (1 << art::mips::A3);
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D | context_mips.cc | 77 gprs_[A3] = nullptr; in SmashCallerSaves()
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/art/runtime/arch/mips64/ |
D | registers_mips64.h | 37 A3 = 7, enumerator
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D | quick_method_frame_info_mips64.h | 33 (1 << art::mips64::A1) | (1 << art::mips64::A2) | (1 << art::mips64::A3) |
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D | context_mips64.cc | 78 gprs_[A3] = nullptr; in SmashCallerSaves()
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/art/compiler/jni/quick/mips/ |
D | calling_convention_mips.cc | 26 static const Register kCoreArgumentRegisters[] = { A0, A1, A2, A3 }; 223 A0, A1, A2, A3
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/art/compiler/optimizing/ |
D | code_generator_mips.h | 33 { A1, A2, A3 }; 44 { A0, A1, A2, A3 }; 122 ? Location::RegisterPairLocation(A2, A3) in GetSetValueLocation()
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D | code_generator_mips64.h | 33 { A1, A2, A3, A4, A5, A6, A7 }; 44 { A0, A1, A2, A3, A4, A5, A6, A7 };
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/art/compiler/jni/quick/mips64/ |
D | calling_convention_mips64.cc | 27 A0, A1, A2, A3, A4, A5, A6, A7
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/art/compiler/utils/mips/ |
D | assembler_mips_test.cc | 64 registers_.push_back(new mips::Register(mips::A3)); in SetUpHelpers() 97 secondary_register_names_.emplace(mips::Register(mips::A3), "a3"); in SetUpHelpers() 232 (Base::GetAssembler()->*f)(mips::A2, mips::A3, &label); in BranchCondTwoRegsHelper() 1335 __ Blt(mips::A2, mips::A3, &label); in TEST_F() 1363 __ Bge(mips::A2, mips::A3, &label); in TEST_F() 1391 __ Bltu(mips::A2, mips::A3, &label); in TEST_F() 1419 __ Bgeu(mips::A2, mips::A3, &label); in TEST_F()
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/art/compiler/utils/mips64/ |
D | assembler_mips64_test.cc | 88 registers_.push_back(new mips64::GpuRegister(mips64::A3)); in SetUpHelpers() 121 secondary_register_names_.emplace(mips64::GpuRegister(mips64::A3), "a3"); in SetUpHelpers() 256 (Base::GetAssembler()->*f)(mips64::A2, mips64::A3, &label); in BranchCondTwoRegsHelper() 798 __ Beqc(mips64::A2, mips64::A3, &label); in TEST_F()
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