Searched refs:A5 (Results 1 – 6 of 6) sorted by relevance
| /art/runtime/arch/mips64/ |
| D | registers_mips64.h | 39 A5 = 9, enumerator
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| D | quick_method_frame_info_mips64.h | 34 (1 << art::mips64::A4) | (1 << art::mips64::A5) | (1 << art::mips64::A6) |
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| D | context_mips64.cc | 80 gprs_[A5] = nullptr; in SmashCallerSaves()
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| /art/compiler/jni/quick/mips64/ |
| D | calling_convention_mips64.cc | 27 A0, A1, A2, A3, A4, A5, A6, A7
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| /art/compiler/optimizing/ |
| D | code_generator_mips64.h | 33 { A1, A2, A3, A4, A5, A6, A7 };
44 { A0, A1, A2, A3, A4, A5, A6, A7 };
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| /art/compiler/utils/mips64/ |
| D | assembler_mips64_test.cc | 90 registers_.push_back(new mips64::GpuRegister(mips64::A5)); in SetUpHelpers()
123 secondary_register_names_.emplace(mips64::GpuRegister(mips64::A5), "a5"); in SetUpHelpers()
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