Home
last modified time | relevance | path

Searched refs:A6 (Results 1 – 6 of 6) sorted by relevance

/art/runtime/arch/mips64/
Dregisters_mips64.h40 A6 = 10, enumerator
Dquick_method_frame_info_mips64.h34 (1 << art::mips64::A4) | (1 << art::mips64::A5) | (1 << art::mips64::A6) |
Dcontext_mips64.cc81 gprs_[A6] = nullptr; in SmashCallerSaves()
/art/compiler/jni/quick/mips64/
Dcalling_convention_mips64.cc27 A0, A1, A2, A3, A4, A5, A6, A7
/art/compiler/optimizing/
Dcode_generator_mips64.h33 { A1, A2, A3, A4, A5, A6, A7 };
44 { A0, A1, A2, A3, A4, A5, A6, A7 };
/art/compiler/utils/mips64/
Dassembler_mips64_test.cc91 registers_.push_back(new mips64::GpuRegister(mips64::A6)); in SetUpHelpers()
124 secondary_register_names_.emplace(mips64::GpuRegister(mips64::A6), "a6"); in SetUpHelpers()