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Searched refs:Address (Results 1 – 25 of 29) sorted by relevance

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/art/compiler/utils/
Dassembler_thumb_test.cc497 __ ldr(R3, Address(R4, 24)); in TEST_F()
498 __ ldrb(R3, Address(R4, 24)); in TEST_F()
499 __ ldrh(R3, Address(R4, 24)); in TEST_F()
500 __ ldrsb(R3, Address(R4, 24)); in TEST_F()
501 __ ldrsh(R3, Address(R4, 24)); in TEST_F()
503 __ ldr(R3, Address(SP, 24)); in TEST_F()
506 __ ldr(R8, Address(R4, 24)); in TEST_F()
507 __ ldrb(R8, Address(R4, 24)); in TEST_F()
508 __ ldrh(R8, Address(R4, 24)); in TEST_F()
509 __ ldrsb(R8, Address(R4, 24)); in TEST_F()
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/art/compiler/utils/x86_64/
Dassembler_x86_64.h169 class Address : public Operand {
171 Address(CpuRegister base_in, int32_t disp) { in Address() function
175 Address(CpuRegister base_in, Offset disp) { in Address() function
179 Address(CpuRegister base_in, FrameOffset disp) { in Address() function
184 Address(CpuRegister base_in, MemberOffset disp) { in Address() function
210 Address(CpuRegister index_in, ScaleFactor scale_in, int32_t disp) { in Address() function
217 Address(CpuRegister base_in, CpuRegister index_in, ScaleFactor scale_in, int32_t disp) { in Address() function
234 static Address Absolute(uintptr_t addr, bool no_rip = false) {
235 Address result;
250 static Address RIP(AssemblerFixup* fixup) { in RIP()
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Dassembler_x86_64.cc47 void X86_64Assembler::call(const Address& address) { in call()
70 void X86_64Assembler::pushq(const Address& address) { in pushq()
98 void X86_64Assembler::popq(const Address& address) { in popq()
131 void X86_64Assembler::movq(const Address& dst, const Immediate& imm) { in movq()
158 void X86_64Assembler::movq(CpuRegister dst, const Address& src) { in movq()
166 void X86_64Assembler::movl(CpuRegister dst, const Address& src) { in movl()
174 void X86_64Assembler::movq(const Address& dst, CpuRegister src) { in movq()
182 void X86_64Assembler::movl(const Address& dst, CpuRegister src) { in movl()
189 void X86_64Assembler::movl(const Address& dst, const Immediate& imm) { in movl()
197 void X86_64Assembler::movntl(const Address& dst, CpuRegister src) { in movntl()
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Dassembler_x86_64_test.cc687 GetAssembler()->LockCmpxchgl(x86_64::Address( in TEST_F()
690 GetAssembler()->LockCmpxchgl(x86_64::Address( in TEST_F()
693 GetAssembler()->LockCmpxchgl(x86_64::Address( in TEST_F()
696 GetAssembler()->LockCmpxchgl(x86_64::Address( in TEST_F()
698 GetAssembler()->LockCmpxchgl(x86_64::Address( in TEST_F()
712 GetAssembler()->LockCmpxchgq(x86_64::Address( in TEST_F()
715 GetAssembler()->LockCmpxchgq(x86_64::Address( in TEST_F()
718 GetAssembler()->LockCmpxchgq(x86_64::Address( in TEST_F()
721 GetAssembler()->LockCmpxchgq(x86_64::Address( in TEST_F()
723 GetAssembler()->LockCmpxchgq(x86_64::Address( in TEST_F()
[all …]
/art/compiler/utils/x86/
Dassembler_x86.h148 class Address : public Operand {
150 Address(Register base_in, int32_t disp) { in Address() function
154 Address(Register base_in, int32_t disp, AssemblerFixup *fixup) { in Address() function
159 Address(Register base_in, Offset disp) { in Address() function
163 Address(Register base_in, FrameOffset disp) { in Address() function
168 Address(Register base_in, MemberOffset disp) { in Address() function
172 Address(Register index_in, ScaleFactor scale_in, int32_t disp) { in Address() function
179 Address(Register base_in, Register index_in, ScaleFactor scale_in, int32_t disp) { in Address() function
183 Address(Register base_in, in Address() function
191 static Address Absolute(uintptr_t addr) { in Absolute()
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Dassembler_x86.cc42 void X86Assembler::call(const Address& address) { in call()
74 void X86Assembler::pushl(const Address& address) { in pushl()
99 void X86Assembler::popl(const Address& address) { in popl()
120 void X86Assembler::movl(Register dst, const Address& src) { in movl()
127 void X86Assembler::movl(const Address& dst, Register src) { in movl()
134 void X86Assembler::movl(const Address& dst, const Immediate& imm) { in movl()
141 void X86Assembler::movl(const Address& dst, Label* lbl) { in movl()
148 void X86Assembler::movntl(const Address& dst, Register src) { in movntl()
168 void X86Assembler::bsfl(Register dst, const Address& src) { in bsfl()
182 void X86Assembler::bsrl(Register dst, const Address& src) { in bsrl()
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Dassembler_x86_test.cc116 GetAssembler()->movntl(x86::Address(x86::EDI, x86::EBX, x86::TIMES_4, 12), x86::EAX); in TEST_F()
117 GetAssembler()->movntl(x86::Address(x86::EDI, 0), x86::EAX); in TEST_F()
148 GetAssembler()->LockCmpxchgl(x86::Address( in TEST_F()
151 GetAssembler()->LockCmpxchgl(x86::Address( in TEST_F()
154 GetAssembler()->LockCmpxchgl(x86::Address( in TEST_F()
157 GetAssembler()->LockCmpxchgl(x86::Address( in TEST_F()
159 GetAssembler()->LockCmpxchgl(x86::Address( in TEST_F()
173 GetAssembler()->LockCmpxchg8b(x86::Address( in TEST_F()
175 GetAssembler()->LockCmpxchg8b(x86::Address( in TEST_F()
177 GetAssembler()->LockCmpxchg8b(x86::Address( in TEST_F()
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/art/compiler/utils/arm/
Dassembler_thumb2_test.cc211 __ ldrd(arm::R0, arm::Address(arm::R2, 8)); in TEST_F()
212 __ ldrd(arm::R0, arm::Address(arm::R12)); in TEST_F()
213 __ strd(arm::R0, arm::Address(arm::R2, 8)); in TEST_F()
285 ASSERT_TRUE(arm::Address::CanHoldStoreOffsetThumb(type, offset)); in TEST_F()
301 ASSERT_FALSE(arm::Address::CanHoldStoreOffsetThumb(type, offset)); in TEST_F()
326 ASSERT_TRUE(arm::Address::CanHoldStoreOffsetThumb(type, offset)); in TEST_F()
350 ASSERT_FALSE(arm::Address::CanHoldStoreOffsetThumb(type, offset)); in TEST_F()
380 __ ldr(arm::R0, arm::Address(arm::R0)); in TEST_F()
386 __ ldr(arm::R0, arm::Address(arm::R0)); in TEST_F()
405 __ ldr(arm::R0, arm::Address(arm::R0)); in TEST_F()
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Dassembler_arm32.cc270 void Arm32Assembler::ldr(Register rd, const Address& ad, Condition cond) { in ldr()
275 void Arm32Assembler::str(Register rd, const Address& ad, Condition cond) { in str()
280 void Arm32Assembler::ldrb(Register rd, const Address& ad, Condition cond) { in ldrb()
285 void Arm32Assembler::strb(Register rd, const Address& ad, Condition cond) { in strb()
290 void Arm32Assembler::ldrh(Register rd, const Address& ad, Condition cond) { in ldrh()
295 void Arm32Assembler::strh(Register rd, const Address& ad, Condition cond) { in strh()
300 void Arm32Assembler::ldrsb(Register rd, const Address& ad, Condition cond) { in ldrsb()
305 void Arm32Assembler::ldrsh(Register rd, const Address& ad, Condition cond) { in ldrsh()
310 void Arm32Assembler::ldrd(Register rd, const Address& ad, Condition cond) { in ldrd()
316 void Arm32Assembler::strd(Register rd, const Address& ad, Condition cond) { in strd()
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Dassembler_arm32.h116 void ldr(Register rd, const Address& ad, Condition cond = AL) OVERRIDE;
117 void str(Register rd, const Address& ad, Condition cond = AL) OVERRIDE;
119 void ldrb(Register rd, const Address& ad, Condition cond = AL) OVERRIDE;
120 void strb(Register rd, const Address& ad, Condition cond = AL) OVERRIDE;
122 void ldrh(Register rd, const Address& ad, Condition cond = AL) OVERRIDE;
123 void strh(Register rd, const Address& ad, Condition cond = AL) OVERRIDE;
125 void ldrsb(Register rd, const Address& ad, Condition cond = AL) OVERRIDE;
126 void ldrsh(Register rd, const Address& ad, Condition cond = AL) OVERRIDE;
128 void ldrd(Register rd, const Address& ad, Condition cond = AL) OVERRIDE;
129 void strd(Register rd, const Address& ad, Condition cond = AL) OVERRIDE;
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Dassembler_thumb2.cc815 void Thumb2Assembler::ldr(Register rd, const Address& ad, Condition cond) { in ldr()
820 void Thumb2Assembler::str(Register rd, const Address& ad, Condition cond) { in str()
825 void Thumb2Assembler::ldrb(Register rd, const Address& ad, Condition cond) { in ldrb()
830 void Thumb2Assembler::strb(Register rd, const Address& ad, Condition cond) { in strb()
835 void Thumb2Assembler::ldrh(Register rd, const Address& ad, Condition cond) { in ldrh()
840 void Thumb2Assembler::strh(Register rd, const Address& ad, Condition cond) { in strh()
845 void Thumb2Assembler::ldrsb(Register rd, const Address& ad, Condition cond) { in ldrsb()
850 void Thumb2Assembler::ldrsh(Register rd, const Address& ad, Condition cond) { in ldrsh()
855 void Thumb2Assembler::ldrd(Register rd, const Address& ad, Condition cond) { in ldrd()
860 void Thumb2Assembler::ldrd(Register rd, Register rd2, const Address& ad, Condition cond) { in ldrd()
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Dassembler_thumb2.h146 void ldr(Register rd, const Address& ad, Condition cond = AL) OVERRIDE;
147 void str(Register rd, const Address& ad, Condition cond = AL) OVERRIDE;
149 void ldrb(Register rd, const Address& ad, Condition cond = AL) OVERRIDE;
150 void strb(Register rd, const Address& ad, Condition cond = AL) OVERRIDE;
152 void ldrh(Register rd, const Address& ad, Condition cond = AL) OVERRIDE;
153 void strh(Register rd, const Address& ad, Condition cond = AL) OVERRIDE;
155 void ldrsb(Register rd, const Address& ad, Condition cond = AL) OVERRIDE;
156 void ldrsh(Register rd, const Address& ad, Condition cond = AL) OVERRIDE;
159 void ldrd(Register rd, const Address& ad, Condition cond = AL) OVERRIDE;
160 void strd(Register rd, const Address& ad, Condition cond = AL) OVERRIDE;
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Dassembler_arm.h257 class Address : public ValueObject {
271 Address(Register rn, int32_t offset = 0, Mode am = Offset) : rn_(rn), rm_(R0), in rn_()
276 Address(Register rn, Register rm, Mode am = Offset) : rn_(rn), rm_(rm), offset_(0), in rn_()
281 Address(Register rn, Register rm, Shift shift, uint32_t count, Mode am = Offset) :
288 explicit Address(int32_t offset) : in Address() function
344 inline std::ostream& operator<<(std::ostream& os, const Address::Mode& rhs) {
575 virtual void ldr(Register rd, const Address& ad, Condition cond = AL) = 0;
576 virtual void str(Register rd, const Address& ad, Condition cond = AL) = 0;
578 virtual void ldrb(Register rd, const Address& ad, Condition cond = AL) = 0;
579 virtual void strb(Register rd, const Address& ad, Condition cond = AL) = 0;
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Dassembler_arm.cc170 uint32_t Address::encodingArm() const { in encodingArm()
192 uint32_t Address::encodingThumb(bool is_32bit) const { in encodingThumb()
249 uint32_t Address::encodingThumbLdrdStrd() const { in encodingThumbLdrdStrd()
273 uint32_t Address::encoding3() const { in encoding3()
282 uint32_t Address::vencoding() const { in vencoding()
298 bool Address::CanHoldLoadOffsetArm(LoadOperandType type, int offset) { in CanHoldLoadOffsetArm()
318 bool Address::CanHoldStoreOffsetArm(StoreOperandType type, int offset) { in CanHoldStoreOffsetArm()
335 bool Address::CanHoldLoadOffsetThumb(LoadOperandType type, int offset) { in CanHoldLoadOffsetThumb()
355 bool Address::CanHoldStoreOffsetThumb(StoreOperandType type, int offset) { in CanHoldStoreOffsetThumb()
/art/compiler/optimizing/
Dcode_generator_x86_64.cc774 Address::Absolute(invoke->GetStringInitOffset(), /* no_rip */ true)); in GenerateStaticOrDirectCall()
789 Address::Absolute(kDummy32BitOffset, /* no_rip */ false)); in GenerateStaticOrDirectCall()
805 __ movq(reg, Address(CpuRegister(RSP), kCurrentMethodStackOffset)); in GenerateStaticOrDirectCall()
809 Address(CpuRegister(method_reg), in GenerateStaticOrDirectCall()
814 __ movq(reg, Address(reg, CodeGenerator::GetCachePointerOffset(index_in_cache))); in GenerateStaticOrDirectCall()
837 __ call(Address(callee_method.AsRegister<CpuRegister>(), in GenerateStaticOrDirectCall()
860 __ movl(temp, Address(CpuRegister(receiver), class_offset)); in GenerateVirtualCall()
871 __ movq(temp, Address(temp, method_offset)); in GenerateVirtualCall()
873 __ call(Address(temp, ArtMethod::EntryPointFromQuickCompiledCodeOffset( in GenerateVirtualCall()
950 __ movq(Address(CpuRegister(RSP), stack_index), CpuRegister(reg_id)); in SaveCoreRegister()
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Dcode_generator_x86.cc742 __ movl(Address(ESP, stack_index), static_cast<Register>(reg_id)); in SaveCoreRegister()
747 __ movl(static_cast<Register>(reg_id), Address(ESP, stack_index)); in RestoreCoreRegister()
752 __ movsd(Address(ESP, stack_index), XmmRegister(reg_id)); in SaveFloatingPointRegister()
757 __ movsd(XmmRegister(reg_id), Address(ESP, stack_index)); in RestoreFloatingPointRegister()
776 __ fs()->call(Address::Absolute(entry_point_offset)); in InvokeRuntime()
850 __ testl(EAX, Address(ESP, -static_cast<int32_t>(GetStackOverflowReservedBytes(kX86)))); in GenerateFrameEntry()
870 __ movl(Address(ESP, kCurrentMethodStackOffset), kMethodRegisterArgument); in GenerateFrameEntry()
994 __ movl(destination.AsRegister<Register>(), Address(ESP, source.GetStackIndex())); in Move32()
1003 __ movss(destination.AsFpuRegister<XmmRegister>(), Address(ESP, source.GetStackIndex())); in Move32()
1008 __ movl(Address(ESP, destination.GetStackIndex()), source.AsRegister<Register>()); in Move32()
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Dintrinsics_x86_64.cc736 __ gs()->call(Address::Absolute(GetThreadOffset<kX86_64WordSize>(entry), true)); in GenFPToFPCall()
927 __ cmpl(idx, Address(obj, count_offset)); in VisitStringCharAt()
932 __ movzxw(out, Address(out, idx, ScaleFactor::TIMES_2, value_offset)); in VisitStringCharAt()
993 __ cmpl(Address(input, length_offset), in CheckPosition()
996 __ cmpl(Address(input, length_offset), length.AsRegister<CpuRegister>()); in CheckPosition()
1002 __ movl(input_len, Address(input, length_offset)); in CheckPosition()
1007 __ leal(temp, Address(input_len, -pos_const)); in CheckPosition()
1027 __ cmpl(Address(input, length_offset), pos_reg); in CheckPosition()
1031 __ movl(temp, Address(input, length_offset)); in CheckPosition()
1104 __ leal(src_base, Address(src, char_size * src_pos_const + data_offset)); in VisitSystemArrayCopyChar()
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Dintrinsics_x86.cc298 __ andpd(output.AsFpuRegister<XmmRegister>(), Address(ESP, 0)); in MathAbsFP()
302 __ andps(output.AsFpuRegister<XmmRegister>(), Address(ESP, 0)); in MathAbsFP()
481 __ movsd(out, Address(ESP, 0)); in GenMinMaxFP()
485 __ movss(out, Address(ESP, 0)); in GenMinMaxFP()
865 __ movsd(Address(ESP, 0), XMM0); in GenFPToFPCall()
869 __ movsd(Address(ESP, 8), XMM1); in GenFPToFPCall()
873 __ fs()->call(Address::Absolute(GetThreadOffset<kX86WordSize>(entry))); in GenFPToFPCall()
876 __ fstpl(Address(ESP, 0)); in GenFPToFPCall()
877 __ movsd(XMM0, Address(ESP, 0)); in GenFPToFPCall()
1065 __ cmpl(idx, Address(obj, count_offset)); in VisitStringCharAt()
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Dcode_generator_x86_64.h261 const Address& address,
482 Address LiteralDoubleAddress(double v);
483 Address LiteralFloatAddress(float v);
484 Address LiteralInt32Address(int32_t v);
485 Address LiteralInt64Address(int64_t v);
499 Address LiteralCaseTable(HPackedSwitch* switch_instr);
505 void MoveInt64ToAddress(const Address& addr_low,
506 const Address& addr_high,
516 assembler_.lock()->addl(Address(CpuRegister(RSP), 0), Immediate(0));
536 const Address& src,
Dcode_generator_x86.h266 const Address& address,
455 Address LiteralDoubleAddress(double v, Register reg);
456 Address LiteralFloatAddress(float v, Register reg);
457 Address LiteralInt32Address(int32_t v, Register reg);
458 Address LiteralInt64Address(int64_t v, Register reg);
466 Address LiteralCaseTable(HX86PackedSwitch* switch_instr, Register reg, Register value);
542 assembler_.lock()->addl(Address(ESP, 0), Immediate(0));
562 const Address& src,
Dintrinsics_arm.cc387 Address(invoke->GetLocations()->InAt(0).AsRegisterPairLow<Register>())); in VisitMemoryPeekByte()
398 Address(invoke->GetLocations()->InAt(0).AsRegisterPairLow<Register>())); in VisitMemoryPeekIntNative()
414 __ ldr(hi, Address(addr, 4)); in VisitMemoryPeekLongNative()
415 __ ldr(lo, Address(addr, 0)); in VisitMemoryPeekLongNative()
417 __ ldr(lo, Address(addr, 0)); in VisitMemoryPeekLongNative()
418 __ ldr(hi, Address(addr, 4)); in VisitMemoryPeekLongNative()
430 Address(invoke->GetLocations()->InAt(0).AsRegisterPairLow<Register>())); in VisitMemoryPeekShortNative()
448 Address(invoke->GetLocations()->InAt(0).AsRegisterPairLow<Register>())); in VisitMemoryPokeByte()
458 Address(invoke->GetLocations()->InAt(0).AsRegisterPairLow<Register>())); in VisitMemoryPokeIntNative()
471 __ str(invoke->GetLocations()->InAt(1).AsRegisterPairLow<Register>(), Address(addr, 0)); in VisitMemoryPokeLongNative()
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/art/runtime/base/
Dmutex.cc376 if (futex(state_.Address(), FUTEX_WAIT, 1, nullptr, nullptr, 0) != 0) { in ExclusiveLock()
480 futex(state_.Address(), FUTEX_WAKE, 1, nullptr, nullptr, 0); in ExclusiveUnlock()
563 if (futex(state_.Address(), FUTEX_WAIT, cur_state, nullptr, nullptr, 0) != 0) { in ExclusiveLock()
604 futex(state_.Address(), FUTEX_WAKE, -1, nullptr, nullptr, 0); in ExclusiveUnlock()
639 if (futex(state_.Address(), FUTEX_WAIT, cur_state, &rel_ts, nullptr, 0) != 0) { in ExclusiveLockWithTimeout()
677 if (futex(state_.Address(), FUTEX_WAIT, cur_state, nullptr, nullptr, 0) != 0) { in HandleSharedLockContention()
800 done = futex(sequence_.Address(), FUTEX_CMP_REQUEUE, 0, in Broadcast()
802 guard_.state_.Address(), cur_sequence) != -1; in Broadcast()
823 int num_woken = futex(sequence_.Address(), FUTEX_WAKE, 1, nullptr, nullptr, 0); in Signal()
848 if (futex(sequence_.Address(), FUTEX_WAIT, cur_sequence, nullptr, nullptr, 0) != 0) { in WaitHoldingLocks()
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Dmutex-inl.h166 futex(state_.Address(), FUTEX_WAKE, -1, nullptr, nullptr, 0); in SharedUnlock()
/art/compiler/trampolines/
Dtrampoline_compiler.cc190 __ fs()->jmp(Address::Absolute(offset)); in CreateTrampoline()
211 __ gs()->jmp(x86_64::Address::Absolute(offset, true)); in CreateTrampoline()
/art/runtime/
Datomic.h294 volatile T* Address() { in PACKED()

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