Searched refs:DivR6 (Results 1 – 6 of 6) sorted by relevance
| /art/compiler/utils/mips64/ |
| D | assembler_mips64.h | 131 void DivR6(GpuRegister rd, GpuRegister rs, GpuRegister rt);
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| D | assembler_mips64.cc | 211 void Mips64Assembler::DivR6(GpuRegister rd, GpuRegister rs, GpuRegister rt) { in DivR6() function in art::mips64::Mips64Assembler
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| /art/compiler/utils/mips/ |
| D | assembler_mips.h | 140 void DivR6(Register rd, Register rs, Register rt); // R6
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| D | assembler_mips.cc | 262 void MipsAssembler::DivR6(Register rd, Register rs, Register rt) { in DivR6() function in art::mips::MipsAssembler
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| /art/compiler/optimizing/ |
| D | code_generator_mips64.cc | 2079 __ DivR6(out, dividend, divisor); in GenerateDivRemIntegral() local
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| D | code_generator_mips.cc | 2412 __ DivR6(out, dividend, divisor); in GenerateDivRemIntegral() local
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