| /art/compiler/utils/arm/ |
| D | assembler_arm32.cc | 1415 CHECK(rn != IP); in AddConstant()
1417 mvn(IP, shifter_op, cond, kCcKeep); in AddConstant()
1418 add(rd, rn, ShifterOperand(IP), cond, set_cc); in AddConstant()
1420 mvn(IP, shifter_op, cond, kCcKeep); in AddConstant()
1421 sub(rd, rn, ShifterOperand(IP), cond, set_cc); in AddConstant()
1423 movw(IP, Low16Bits(value), cond); in AddConstant()
1426 movt(IP, value_high, cond); in AddConstant()
1428 add(rd, rn, ShifterOperand(IP), cond, set_cc); in AddConstant()
1440 movw(IP, Low16Bits(value), cond); in CmpConstant()
1443 movt(IP, value_high, cond); in CmpConstant()
[all …]
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| D | assembler_thumb2.cc | 2274 int32_t mov_encoding = MovModImmEncoding32(IP, offset & ~0x3ff); in Emit()
2275 int16_t add_pc_encoding = AddRdnRmEncoding16(IP, PC); in Emit()
2276 int32_t ldr_encoding = LoadWideOrFpEncoding(IP, offset & 0x3ff); // DCHECKs type_. in Emit()
2286 int32_t movw_encoding = MovwEncoding32(IP, offset & 0xffff); in Emit()
2287 int32_t movt_encoding = MovtEncoding32(IP, offset & ~0xffff); in Emit()
2288 int16_t add_pc_encoding = AddRdnRmEncoding16(IP, PC); in Emit()
2289 int32_t ldr_encoding = LoadWideOrFpEncoding(IP, 0); // DCHECKs type_. in Emit()
3509 CHECK(rn != IP); in AddConstant()
3511 Register temp = (rd != rn) ? rd : IP; in AddConstant()
3541 CHECK(rn != IP); in CmpConstant()
[all …]
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| D | assembler_thumb2_test.cc | 288 __ StoreToOffset(type, arm::IP, arm::SP, offset); in TEST_F()
289 __ StoreToOffset(type, arm::IP, arm::R5, offset); in TEST_F()
304 __ StoreToOffset(type, arm::IP, arm::SP, offset); in TEST_F()
305 __ StoreToOffset(type, arm::IP, arm::R5, offset); in TEST_F()
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| D | assembler_arm.h | 748 LoadImmediate(IP, int_value, cond);
749 vmovsr(sd, IP, cond);
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| /art/compiler/optimizing/ |
| D | code_generator_arm.cc | 840 blocked_core_registers_[IP] = true; in SetupBlockedRegisters()
909 __ AddConstant(IP, SP, -static_cast<int32_t>(GetStackOverflowReservedBytes(kArm))); in GenerateFrameEntry()
910 __ LoadFromOffset(kLoadWord, IP, IP, 0); in GenerateFrameEntry()
1095 __ LoadFromOffset(kLoadWord, IP, SP, source.GetStackIndex()); in Move32()
1096 __ StoreToOffset(kStoreWord, IP, SP, destination.GetStackIndex()); in Move32()
2666 __ mul(IP, in1_lo, in2_hi); in VisitMul()
2668 __ mla(out_hi, in1_hi, in2_lo, IP); in VisitMul()
2670 __ umull(out_lo, IP, in1_lo, in2_lo); in VisitMul()
2672 __ add(out_hi, out_hi, ShifterOperand(IP)); in VisitMul()
3110 __ orrs(IP, in VisitDivZeroCheck()
[all …]
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| D | intrinsics_arm.cc | 551 __ add(IP, base, ShifterOperand(offset)); in GenUnsafeGet()
554 __ ldrexd(trg_lo, trg_hi, IP); in GenUnsafeGet()
556 __ ldrd(trg_lo, Address(IP)); in GenUnsafeGet()
710 __ add(IP, base, ShifterOperand(offset)); in GenUnsafePut()
713 __ ldrexd(temp_lo, temp_hi, IP); in GenUnsafePut()
714 __ strexd(temp_lo, value_lo, value_hi, IP); in GenUnsafePut()
718 __ add(IP, base, ShifterOperand(offset)); in GenUnsafePut()
719 __ strd(value_lo, Address(IP)); in GenUnsafePut()
1580 __ ldr(IP, Address(temp1, element_size, Address::PostIndex)); in VisitSystemArrayCopy()
1581 __ str(IP, Address(temp2, element_size, Address::PostIndex)); in VisitSystemArrayCopy()
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| /art/runtime/arch/arm/ |
| D | registers_arm.h | 45 IP = 12, enumerator
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| /art/compiler/jni/quick/arm/ |
| D | calling_convention_arm.cc | 48 return ArmManagedRegister::FromCoreRegister(IP); // R12 in InterproceduralScratchRegister()
52 return ArmManagedRegister::FromCoreRegister(IP); // R12 in InterproceduralScratchRegister()
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| /art/compiler/trampolines/ |
| D | trampoline_compiler.cc | 61 __ LoadFromOffset(kLoadWord, IP, R0, JNIEnvExt::SelfOffset(4).Int32Value()); in CreateTrampoline()
62 __ LoadFromOffset(kLoadWord, PC, IP, offset.Int32Value()); in CreateTrampoline()
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