| /art/compiler/optimizing/ |
| D | code_generator_arm.cc | 209 __ LoadImmediate(calling_convention.GetRegisterAt(0), cls_->GetTypeIndex()); in EmitNativeCode() local
263 __ LoadImmediate(calling_convention.GetRegisterAt(0), string_index); in EmitNativeCode() local
587 __ LoadImmediate(calling_convention.GetRegisterAt(2), offset_); in EmitNativeCode() local
1169 __ LoadImmediate(location.AsRegister<Register>(), value); in MoveConstant() local
1614 __ LoadImmediate(out, 0); in HandleCondition() local
1619 __ LoadImmediate(out, 1); in HandleCondition() local
1882 __ LoadImmediate(hidden_reg, invoke->GetDexMethodIndex()); in VisitInvokeInterface() local
2268 __ LoadImmediate(out.AsRegister<Register>(), static_cast<int32_t>(value)); in VisitTypeConversion() local
2709 __ LoadImmediate(out, 0); in DivRemOneOrMinusOne() local
2771 __ LoadImmediate(temp1, magic); in GenerateDivRemWithAnyConstant() local
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| D | intrinsics_arm.cc | 1087 __ LoadImmediate(temp1, value_offset); in VisitStringEquals() local
1103 __ LoadImmediate(out, 1); in VisitStringEquals() local
1108 __ LoadImmediate(out, 0); in VisitStringEquals() local
1139 __ LoadImmediate(tmp_reg, std::numeric_limits<uint16_t>::max()); in GenerateVisitStringIndexOf() local
1149 __ LoadImmediate(tmp_reg, 0); in GenerateVisitStringIndexOf() local
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| /art/compiler/utils/arm64/ |
| D | assembler_arm64.cc | 162 LoadImmediate(scratch.AsXRegister(), imm); in StoreImmediateToFrame()
171 LoadImmediate(scratch.AsXRegister(), imm); in StoreImmediateToThread64()
201 void Arm64Assembler::LoadImmediate(XRegister dest, int32_t value, in LoadImmediate() function in art::arm64::Arm64Assembler
568 LoadImmediate(out_reg.AsXRegister(), 0, eq); in CreateHandleScopeEntry()
604 LoadImmediate(out_reg.AsXRegister(), 0, eq); in LoadReferenceFromHandleScope()
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| D | assembler_arm64.h | 263 void LoadImmediate(XRegister dest, int32_t value, vixl::Condition cond = vixl::al);
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| /art/compiler/utils/arm/ |
| D | assembler_arm.cc | 566 LoadImmediate(scratch.AsCoreRegister(), imm); in StoreImmediateToFrame()
574 LoadImmediate(scratch.AsCoreRegister(), imm); in StoreImmediateToThread32()
753 LoadImmediate(out_reg.AsCoreRegister(), 0, EQ); in CreateHandleScopeEntry()
792 LoadImmediate(out_reg.AsCoreRegister(), 0, EQ); // TODO: why EQ? in LoadReferenceFromHandleScope()
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| D | assembler_arm32.cc | 1449 void Arm32Assembler::LoadImmediate(Register rd, int32_t value, Condition cond) { in LoadImmediate() function in art::arm::Arm32Assembler
1474 LoadImmediate(IP, offset, cond); in LoadFromOffset()
1514 LoadImmediate(IP, offset, cond); in LoadSFromOffset()
1532 LoadImmediate(IP, offset, cond); in LoadDFromOffset()
1552 LoadImmediate(IP, offset, cond); in StoreToOffset()
1586 LoadImmediate(IP, offset, cond); in StoreSToOffset()
1604 LoadImmediate(IP, offset, cond); in StoreDToOffset()
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| D | assembler_arm.h | 737 virtual void LoadImmediate(Register rd, int32_t value, Condition cond = AL) = 0;
748 LoadImmediate(IP, int_value, cond);
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| D | assembler_arm32.h | 269 void LoadImmediate(Register rd, int32_t value, Condition cond = AL) OVERRIDE;
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| D | assembler_thumb2.h | 318 void LoadImmediate(Register rd, int32_t value, Condition cond = AL) OVERRIDE;
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| D | assembler_thumb2.cc | 3562 void Thumb2Assembler::LoadImmediate(Register rd, int32_t value, Condition cond) { in LoadImmediate() function in art::arm::Thumb2Assembler
3639 LoadImmediate(temp, offset, cond); in AdjustLoadStoreOffset()
3665 LoadImmediate(temp, offset, cond); in LoadFromOffset()
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