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Searched refs:RelOffset (Results 1 – 11 of 11) sorted by relevance

/art/compiler/debug/dwarf/
Ddwarf_test.cc113 opcodes.RelOffset(Reg(0), 0); // push R0 in TEST_F()
115 opcodes.RelOffset(Reg(1), 4); // push R1 in TEST_F()
159 opcodes.RelOffset(Reg::X86_64Core(i), 0); in TEST_F()
Ddebug_frame_opcode_writer.h73 void ALWAYS_INLINE RelOffset(Reg reg, int offset) { in RelOffset() function
92 RelOffset(Reg(reg_base.num() + i), offset); in RelOffsetForMany()
/art/compiler/utils/arm64/
Dassembler_arm64.cc655 cfi_.RelOffset(DWARFReg(dst0), offset); in SpillRegisters()
656 cfi_.RelOffset(DWARFReg(dst1), offset + size); in SpillRegisters()
662 cfi_.RelOffset(DWARFReg(dst0), offset); in SpillRegisters()
/art/compiler/utils/mips64/
Dassembler_mips64.cc1992 cfi_.RelOffset(DWARFReg(RA), stack_offset); in BuildFrame()
1997 cfi_.RelOffset(DWARFReg(reg), stack_offset); in BuildFrame()
/art/compiler/utils/x86_64/
Dassembler_x86_64.cc2654 cfi_.RelOffset(DWARFReg(spill.AsCpuRegister().AsRegister()), 0); in BuildFrame()
2671 cfi_.RelOffset(DWARFReg(spill.AsXmmRegister().AsFloatRegister()), offset); in BuildFrame()
/art/compiler/utils/mips/
Dassembler_mips.cc2453 cfi_.RelOffset(DWARFReg(RA), stack_offset); in BuildFrame()
2458 cfi_.RelOffset(DWARFReg(reg), stack_offset); in BuildFrame()
/art/compiler/optimizing/
Dcode_generator_mips64.cc557 __ cfi().RelOffset(DWARFReg(reg), ofs); in GenerateFrameEntry()
566 __ cfi().RelOffset(DWARFReg(reg), ofs); in GenerateFrameEntry()
Dcode_generator_x86_64.cc1066 __ cfi().RelOffset(DWARFReg(reg), 0); in GenerateFrameEntry()
1080 __ cfi().RelOffset(DWARFReg(kFpuCalleeSaves[i]), offset); in GenerateFrameEntry()
Dcode_generator_mips.cc710 __ cfi().RelOffset(DWARFReg(reg), ofs); in GenerateFrameEntry()
Dcode_generator_x86.cc863 __ cfi().RelOffset(DWARFReg(reg), 0); in GenerateFrameEntry()
/art/compiler/utils/x86/
Dassembler_x86.cc1939 cfi_.RelOffset(DWARFReg(spill), 0); in BuildFrame()