| /art/compiler/optimizing/ |
| D | code_generator_mips.cc | 1260 __ Sltu(TMP, dst_low, (dst_low == rhs_low) ? lhs_low : rhs_low); in HandleBinaryOp() local
1266 __ Sltu(TMP, lhs_low, rhs_low); in HandleBinaryOp() local
1354 __ Sltu(AT, dst_low, TMP); in HandleBinaryOp() local
2104 __ Sltu(TMP, lhs_low, rhs_low); in VisitCompare() local
2105 __ Sltu(AT, rhs_low, lhs_low); // Inverted: is actually gt. in VisitCompare() local
2647 __ Sltu(dst, ZERO, dst); in GenerateIntCompare() local
2706 __ Sltu(dst, lhs, rhs_reg); in GenerateIntCompare() local
2736 __ Sltu(dst, rhs_reg, lhs); in GenerateIntCompare() local
2909 __ Sltu(AT, lhs_low, AT); in GenerateLongCompareAndBranch() local
2917 __ Sltu(AT, lhs_low, AT); in GenerateLongCompareAndBranch() local
[all …]
|
| D | intrinsics_mips.cc | 793 __ Sltu(TMP, out_lo, TMP); in GenAbsInteger() local
1104 __ Sltu(TMP, b_lo, a_lo); in GenMinMax() local
1169 __ Sltu(TMP, a_lo, b_lo); in GenMinMax() local
2281 __ Sltu(out, ZERO, out); in GenIsInfinite() local
|
| D | code_generator_mips64.cc | 2276 __ Sltu(dst, ZERO, dst); in GenerateIntLongCompare() local
2335 __ Sltu(dst, lhs, rhs_reg); in GenerateIntLongCompare() local
2365 __ Sltu(dst, rhs_reg, lhs); in GenerateIntLongCompare() local
|
| D | intrinsics_mips64.cc | 1675 __ Sltu(out, ZERO, out); in GenIsInfinite() local
|
| /art/compiler/utils/mips/ |
| D | assembler_mips_test.cc | 504 TEST_F(AssemblerMIPSTest, Sltu) { in TEST_F() argument
505 DriverStr(RepeatRRR(&mips::MipsAssembler::Sltu, "sltu ${reg1}, ${reg2}, ${reg3}"), "Sltu"); in TEST_F()
|
| D | assembler_mips.cc | 514 void MipsAssembler::Sltu(Register rd, Register rs, Register rt) { in Sltu() function in art::mips::MipsAssembler
2222 Sltu(AT, rs, rt); in Bltu()
2234 Sltu(AT, rs, rt); in Bgeu()
|
| D | assembler_mips.h | 202 void Sltu(Register rd, Register rs, Register rt);
|
| /art/compiler/utils/mips64/ |
| D | assembler_mips64.h | 203 void Sltu(GpuRegister rd, GpuRegister rs, GpuRegister rt);
|
| D | assembler_mips64.cc | 485 void Mips64Assembler::Sltu(GpuRegister rd, GpuRegister rs, GpuRegister rt) { in Sltu() function in art::mips64::Mips64Assembler
|