Searched refs:imm21 (Results 1 – 4 of 4) sorted by relevance
| /art/compiler/utils/mips64/ |
| D | assembler_mips64.cc | 141 void Mips64Assembler::EmitI21(int opcode, GpuRegister rs, uint32_t imm21) { in EmitI21() argument
143 CHECK(IsUint<21>(imm21)) << imm21; in EmitI21()
146 imm21; in EmitI21()
616 void Mips64Assembler::Beqzc(GpuRegister rs, uint32_t imm21) { in Beqzc() argument
618 EmitI21(0x36, rs, imm21); in Beqzc()
621 void Mips64Assembler::Bnezc(GpuRegister rs, uint32_t imm21) { in Bnezc() argument
623 EmitI21(0x3E, rs, imm21); in Bnezc()
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| D | assembler_mips64.h | 231 void Beqzc(GpuRegister rs, uint32_t imm21);
232 void Bnezc(GpuRegister rs, uint32_t imm21);
679 void EmitI21(int opcode, GpuRegister rs, uint32_t imm21);
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| /art/compiler/utils/mips/ |
| D | assembler_mips.h | 240 void Beqzc(Register rs, uint32_t imm21); // R6
241 void Bnezc(Register rs, uint32_t imm21); // R6
765 void EmitI21(int opcode, Register rs, uint32_t imm21);
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| D | assembler_mips.cc | 148 void MipsAssembler::EmitI21(int opcode, Register rs, uint32_t imm21) { in EmitI21() argument
150 CHECK(IsUint<21>(imm21)) << imm21; in EmitI21()
153 imm21; in EmitI21()
704 void MipsAssembler::Beqzc(Register rs, uint32_t imm21) { in Beqzc() argument
707 EmitI21(0x36, rs, imm21); in Beqzc()
710 void MipsAssembler::Bnezc(Register rs, uint32_t imm21) { in Bnezc() argument
713 EmitI21(0x3E, rs, imm21); in Bnezc()
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