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Searched refs:instructions (Results 1 – 16 of 16) sorted by relevance

/art/test/435-try-finally-without-catch/
Dinfo.txt2 instructions with a `finally' clause but without any `catch' block,
22 improperly tried to remove its (their) instructions, sometimes
23 removing instructions used by others instructions, thus triggering
25 instructions in a proper fashion, by removing them as users first, and
/art/test/465-checker-clinit-gvn/
Dinfo.txt1 Check that we GVN HClinitCheck instructions.
/art/test/538-checker-embed-constants/
Dinfo.txt1 Test embedding of constants in assembler instructions.
/art/test/436-shift-constant/
Dinfo.txt1 Regression tests for shift instructions and constants larger than 8bits.
/art/test/551-checker-shifter-operand/
Dinfo.txt1 Test the merging of instructions into the shifter operand on arm64.
/art/test/550-checker-multiply-accumulate/
Dinfo.txt1 Test the merging of instructions into the shifter operand on arm64.
/art/test/402-optimizing-control-flow/
Dinfo.txt1 A set of tests for testing control flow instructions on the optimizing compiler.
/art/test/505-simplifier-type-propagation/
Dinfo.txt3 instructions from one type to the same type.
/art/test/478-checker-clinit-check-pruning/
Dinfo.txt1 Test ensuring class initializations checks (and load class instructions)
/art/compiler/utils/
Dassembler.cc82 void AssemblerBuffer::FinalizeInstructions(const MemoryRegion& instructions) { in FinalizeInstructions() argument
85 instructions.CopyFrom(0, from); in FinalizeInstructions()
87 ProcessFixups(instructions); in FinalizeInstructions()
/art/test/510-checker-try-catch/smali/
DRuntime.smali183 # Register v0 holds different constants at two throwing instructions. Runtime is
213 # Register v0 holds different integer values at two throwing instructions.
251 # Register pair (v0, v1) holds different long values at two throwing instructions.
302 # Register v0 holds different float values at two throwing instructions. Runtime
344 # Register pair (v0, v1) holds different double values at two throwing instructions.
386 # Register v0 holds different integer values at two throwing instructions.
435 # Register pair (v0, v1) holds different double values at two throwing instructions.
/art/runtime/interpreter/mterp/
DREADME.txt3 NOTE: Find rebuilding instructions at the bottom of this file.
55 note be used on RETURN-class instructions.
139 The generation tool does *not* print a warning if your instructions
141 oversized handler. On architectures with fixed-width instructions this
/art/compiler/optimizing/
Dinliner.cc1119 for (HInstructionIterator instructions(callee_graph->GetEntryBlock()->GetInstructions()); in TryBuildAndInlineHelper() local
1120 !instructions.Done(); in TryBuildAndInlineHelper()
1121 instructions.Advance()) { in TryBuildAndInlineHelper()
1122 HInstruction* current = instructions.Current(); in TryBuildAndInlineHelper()
Dnodes.h2194 explicit HInstructionIterator(const HInstructionList& instructions) in HInstructionIterator() argument
2195 : instruction_(instructions.first_instruction_) { in HInstructionIterator()
2215 explicit HBackwardInstructionIterator(const HInstructionList& instructions) in HBackwardInstructionIterator() argument
2216 : instruction_(instructions.last_instruction_) { in HBackwardInstructionIterator()
/art/test/543-checker-dce-trycatch/smali/
DTestCase.smali204 # Test that DCE removes catch phi uses of instructions defined in dead try blocks.
277 # Test that DCE does not remove catch phi uses of instructions defined outside
/art/runtime/arch/arm/
Dquick_entrypoints_arm.S597 …ldrex r1, [r0, #MIRROR_OBJECT_LOCK_WORD_OFFSET] @ Need to use atomic instructions for read barri…