/art/runtime/arch/arm/ |
D | memcmp16_arm.S | 58 1: ldrh r0, [r3], #2 59 ldrh ip, [r1], #2 77 ldrh r0, [r3], #2 78 ldrh ip, [r1], #2 160 ldrh r0, [r3, #-4] 161 ldrh ip, [r1, #-4] 174 8: ldrh r0, [r3], #2 175 ldrh ip, [r1], #2
|
D | quick_entrypoints_arm.S | 1223 ldrh r0, [rSELF, #THREAD_FLAGS_OFFSET] 1651 ldrh r3, [r0, #2]! 1652 ldrh r4, [r0, #2]! 1653 ldrh r10, [r0, #2]! 1654 ldrh r11, [r0, #2]! 1671 ldrh r3, [r0, #2]! 1776 ldrh r3, [r2, #2]! 1777 ldrh r4, [r1, #2]! 1778 ldrh r7, [r2, #2]! 1779 ldrh r8, [r1, #2]! [all …]
|
/art/runtime/interpreter/mterp/arm64/ |
D | header.S | 142 ldrh wINST, [xPC] 158 ldrh wINST, [xPC, #((\count)*2)]! 166 ldrh \dreg, [\sreg, #((\count)*2)]! 175 ldrh wINST, [xPC, #((\count)*2)] 191 ldrh wINST, [xPC] 201 ldrh \reg, [xPC, #((\count)*2)]
|
/art/runtime/interpreter/mterp/arm/ |
D | header.S | 145 ldrh rINST, [rPC] 161 ldrh rINST, [rPC, #((\count)*2)]! 169 ldrh \dreg, [\sreg, #((\count)*2)]! 178 ldrh rINST, [rPC, #((\count)*2)] 197 ldrh rINST, [rPC, \reg]! 207 ldrh \reg, [rPC, #((\count)*2)]
|
/art/runtime/arch/arm64/ |
D | memcmp16_arm64.S | 134 ldrh data1w, [src1], #2 135 ldrh data2w, [src2], #2
|
D | quick_entrypoints_arm64.S | 1781 ldrh w0, [xSELF, #THREAD_FLAGS_OFFSET] // get xSELF->state_and_flags.as_struct.flags 2156 ldrh w6, [x0, #2]! 2157 ldrh w7, [x0, #2]! 2158 ldrh wIP0, [x0, #2]! 2159 ldrh wIP1, [x0, #2]! 2176 ldrh w6, [x0, #2]! 2261 ldrh w4, [x2], #2 2262 ldrh w5, [x1], #2 2264 ldrh w6, [x2], #2 2265 ldrh w7, [x1], #2 [all …]
|
/art/compiler/utils/ |
D | assembler_thumb_test.cc | 499 __ ldrh(R3, Address(R4, 24)); in TEST_F() local 508 __ ldrh(R8, Address(R4, 24)); in TEST_F() local 546 __ ldrh(R3, Address(R4, 24, Address::Mode::Offset)); in TEST_F() local 547 __ ldrh(R3, Address(R4, 24, Address::Mode::PreIndex)); in TEST_F() local 548 __ ldrh(R3, Address(R4, 24, Address::Mode::PostIndex)); in TEST_F() local 549 __ ldrh(R3, Address(R4, 24, Address::Mode::NegOffset)); in TEST_F() local 550 __ ldrh(R3, Address(R4, 24, Address::Mode::NegPreIndex)); in TEST_F() local 551 __ ldrh(R3, Address(R4, 24, Address::Mode::NegPostIndex)); in TEST_F() local 611 __ ldrh(R3, Address(R4, -24, Address::Mode::Offset)); in TEST_F() local 612 __ ldrh(R3, Address(R4, -24, Address::Mode::PreIndex)); in TEST_F() local [all …]
|
D | assembler_thumb_test_expected.cc.inc | 225 " 4: 8b23 ldrh r3, [r4, #24]\n", 231 " 18: f8b4 8018 ldrh.w r8, [r4, #24]\n", 259 " 2c: 8b23 ldrh r3, [r4, #24]\n", 260 " 2e: f834 3f18 ldrh.w r3, [r4, #24]!\n", 261 " 32: f834 3b18 ldrh.w r3, [r4], #24\n", 262 " 36: f834 3c18 ldrh.w r3, [r4, #-24]\n", 263 " 3a: f834 3d18 ldrh.w r3, [r4, #-24]!\n", 264 " 3e: f834 3918 ldrh.w r3, [r4], #-24\n", 313 " 30: f834 3c18 ldrh.w r3, [r4, #-24]\n", 314 " 34: f834 3d18 ldrh.w r3, [r4, #-24]!\n", [all …]
|
/art/runtime/interpreter/mterp/out/ |
D | mterp_arm64.S | 149 ldrh wINST, [xPC] 165 ldrh wINST, [xPC, #((\count)*2)]! 173 ldrh \dreg, [\sreg, #((\count)*2)]! 182 ldrh wINST, [xPC, #((\count)*2)] 198 ldrh wINST, [xPC] 208 ldrh \reg, [xPC, #((\count)*2)] 1849 ldrh w2, [x0, #MIRROR_CHAR_ARRAY_DATA_OFFSET] // w2<- vBB[vCC] 6757 ldrh w0, [x3, x1] // w0<- obj.field
|
D | mterp_arm.S | 152 ldrh rINST, [rPC] 168 ldrh rINST, [rPC, #((\count)*2)]! 176 ldrh \dreg, [\sreg, #((\count)*2)]! 185 ldrh rINST, [rPC, #((\count)*2)] 204 ldrh rINST, [rPC, \reg]! 214 ldrh \reg, [rPC, #((\count)*2)] 1938 ldrh r2, [r0, #MIRROR_CHAR_ARRAY_DATA_OFFSET] @ r2<- vBB[vCC] 7175 ldrh r0, [r3, r1] @ r0<- obj.field
|
/art/compiler/utils/arm/ |
D | assembler_arm32.h | 122 void ldrh(Register rd, const Address& ad, Condition cond = AL) OVERRIDE;
|
D | assembler_arm32.cc | 290 void Arm32Assembler::ldrh(Register rd, const Address& ad, Condition cond) { in ldrh() function in art::arm::Arm32Assembler 1491 ldrh(reg, Address(base, offset), cond); in LoadFromOffset()
|
D | assembler_thumb2.h | 152 void ldrh(Register rd, const Address& ad, Condition cond = AL) OVERRIDE;
|
D | assembler_arm.h | 581 virtual void ldrh(Register rd, const Address& ad, Condition cond = AL) = 0;
|
D | assembler_thumb2.cc | 835 void Thumb2Assembler::ldrh(Register rd, const Address& ad, Condition cond) { in ldrh() function in art::arm::Thumb2Assembler 3685 ldrh(reg, Address(base, offset), cond); in LoadFromOffset()
|
/art/compiler/optimizing/ |
D | intrinsics_arm.cc | 982 __ ldrh(out, Address(array_temp, idx, LSL, 1)); // out := array_temp[idx]. in VisitStringCharAt() local 1982 __ ldrh(tmp, Address(src_ptr, char_size, Address::PostIndex)); in VisitStringGetCharsNoCheck() local
|