/external/llvm/test/Verifier/ |
D | alias.ll | 23 ; CHECK: Aliases cannot form a cycle 25 ; CHECK-NEXT: Aliases cannot form a cycle
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/external/llvm/lib/Analysis/ |
D | TypeBasedAliasAnalysis.cpp | 297 if (Aliases(AM, BM)) in alias() 352 if (!Aliases(L, M)) in getModRefInfo() 367 if (!Aliases(M1, M2)) in getModRefInfo() 481 bool TypeBasedAAResult::Aliases(const MDNode *A, const MDNode *B) const { in Aliases() function in TypeBasedAAResult
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/external/llvm/test/Assembler/ |
D | alias-use-list-order.ll | 8 ; Aliases.
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/external/llvm/test/Linker/Inputs/ |
D | visibility.ll | 9 ; Aliases
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/external/llvm/test/Analysis/BasicAA/ |
D | 2003-02-26-AccessSizeTest.ll | 15 store i8 1, i8* %C ; Aliases %A
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/external/vixl/src/vixl/a64/ |
D | macro-assembler-a64.h | 1436 VIXL_ASSERT(!rt.Aliases(rt2)); in Ldaxp() 1543 VIXL_ASSERT(!rt.Aliases(rt2)); in Ldxp() 1828 VIXL_ASSERT(!rs.Aliases(dst.base())); in Stlxp() 1829 VIXL_ASSERT(!rs.Aliases(rt)); in Stlxp() 1830 VIXL_ASSERT(!rs.Aliases(rt2)); in Stlxp() 1836 VIXL_ASSERT(!rs.Aliases(dst.base())); in Stlxr() 1837 VIXL_ASSERT(!rs.Aliases(rt)); in Stlxr() 1843 VIXL_ASSERT(!rs.Aliases(dst.base())); in Stlxrb() 1844 VIXL_ASSERT(!rs.Aliases(rt)); in Stlxrb() 1850 VIXL_ASSERT(!rs.Aliases(dst.base())); in Stlxrh() [all …]
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D | macro-assembler-a64.cc | 2116 if (args[i].Aliases(pcs[i])) continue; in PrintfNoPreserve() 2224 VIXL_ASSERT(!sp.Aliases(arg0)); in Printf() 2225 VIXL_ASSERT(!sp.Aliases(arg1)); in Printf() 2226 VIXL_ASSERT(!sp.Aliases(arg2)); in Printf() 2227 VIXL_ASSERT(!sp.Aliases(arg3)); in Printf() 2250 bool arg0_sp = StackPointer().Aliases(arg0); in Printf() 2251 bool arg1_sp = StackPointer().Aliases(arg1); in Printf() 2252 bool arg2_sp = StackPointer().Aliases(arg2); in Printf() 2253 bool arg3_sp = StackPointer().Aliases(arg3); in Printf()
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/external/llvm/include/llvm/Analysis/ |
D | TypeBasedAliasAnalysis.h | 47 bool Aliases(const MDNode *A, const MDNode *B) const;
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/external/llvm/test/Linker/ |
D | visibility.ll | 23 ; Aliases
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/external/llvm/utils/TableGen/ |
D | CodeGenSchedule.h | 56 RecVec Aliases; member 87 assert((!IsAlias || Aliases.empty()) && "Alias cannot have aliases"); in isValid()
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D | CodeGenSchedule.cpp | 298 RW.Aliases.push_back(*AI); in collectSchedRW() 420 for (RecIter AI = SchedWrite.Aliases.begin(), AE = SchedWrite.Aliases.end(); in expandRWSeqForProc() 991 for (RecIter I = RW.Aliases.begin(), E = RW.Aliases.end(); I != E; ++I) { in hasAliasedVariants() 1061 for (RecIter AI = SchedRW.Aliases.begin(), AE = SchedRW.Aliases.end(); in getIntersectingVariants() 1562 for (RecIter AI = SchedRW.Aliases.begin(), AE = SchedRW.Aliases.end(); in collectRWResources()
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D | AsmMatcherEmitter.cpp | 2368 std::vector<Record*> &Aliases, in emitMnemonicAliasVariant() argument 2375 for (unsigned i = 0, e = Aliases.size(); i != e; ++i) { in emitMnemonicAliasVariant() 2376 Record *R = Aliases[i]; in emitMnemonicAliasVariant() 2448 std::vector<Record*> Aliases = in emitMnemonicAliases() local 2450 if (Aliases.empty()) return false; in emitMnemonicAliases() 2461 emitMnemonicAliasVariant(OS, Info, Aliases, /*Indent=*/2, in emitMnemonicAliases() 2468 emitMnemonicAliasVariant(OS, Info, Aliases); in emitMnemonicAliases()
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D | AsmWriterEmitter.cpp | 823 for (auto &Aliases : AliasMap) { in EmitPrintAliasInstruction() local 824 for (auto &Alias : Aliases.second) { in EmitPrintAliasInstruction() 940 IAPrinterMap[Aliases.first].push_back(std::move(IAP)); in EmitPrintAliasInstruction()
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D | SubtargetEmitter.cpp | 663 for (RecIter AI = SchedWrite.Aliases.begin(), AE = SchedWrite.Aliases.end(); in FindWriteResources() 717 for (RecIter AI = SchedRead.Aliases.begin(), AE = SchedRead.Aliases.end(); in FindReadAdvance()
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/external/llvm/lib/Target/Hexagon/ |
D | HexagonRegisterInfo.td | 19 let Aliases = alias; 95 // Aliases of the R* registers used to hold 64-bit int values (doubles). 172 // Aliases of the V* registers used to hold double vec values.
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/external/clang/lib/Basic/ |
D | TargetInfo.cpp | 383 for (const char *A : GRA.Aliases) { in isValidGCCRegisterName() 424 for (const char *A : RA.Aliases) { in getNormalizedGCCRegisterName()
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/external/llvm/lib/Target/Sparc/ |
D | SparcRegisterInfo.td | 189 // Aliases of the F* registers used to hold 64-bit fp values (doubles) 226 // Aliases of the F* registers used to hold 128-bit for values (long doubles). 244 // Aliases of the integer registers used for LDD/STD double-word operations
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/external/icu/icu4c/source/tools/tzcode/ |
D | icuzones | 39 #### Aliases that conflict with Olson compatibility Zone definition
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/external/llvm/test/Transforms/FunctionImport/ |
D | funcimport.ll | 35 ; Aliases import the aliasee function
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/external/llvm/test/Bitcode/ |
D | highLevelStructure.3.2.ll | 19 ; Aliases Test
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D | compatibility-3.7.ll | 172 ;; Aliases 176 ; Aliases -- Linkage 192 ; Aliases -- Visibility 200 ; Aliases -- DLLStorageClass 208 ; Aliases -- ThreadLocal 220 ; Aliases -- unnamed_addr
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D | compatibility-3.6.ll | 172 ;; Aliases 176 ; Aliases -- Linkage 192 ; Aliases -- Visibility 200 ; Aliases -- DLLStorageClass 208 ; Aliases -- ThreadLocal 220 ; Aliases -- unnamed_addr
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/external/llvm/lib/Target/AMDGPU/ |
D | VIInstructions.td | 76 // Aliases to simplify matching of floating-point instructions that
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/external/v8/src/arm64/ |
D | macro-assembler-arm64.cc | 4552 if (args[i].Aliases(pcs[i])) continue; in PrintfNoPreserve() 4654 DCHECK(!csp.Aliases(arg0)); in Printf() 4655 DCHECK(!csp.Aliases(arg1)); in Printf() 4656 DCHECK(!csp.Aliases(arg2)); in Printf() 4657 DCHECK(!csp.Aliases(arg3)); in Printf() 4685 bool arg0_sp = StackPointer().Aliases(arg0); in Printf() 4686 bool arg1_sp = StackPointer().Aliases(arg1); in Printf() 4687 bool arg2_sp = StackPointer().Aliases(arg2); in Printf() 4688 bool arg3_sp = StackPointer().Aliases(arg3); in Printf()
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/external/clang/include/clang/Basic/ |
D | TargetInfo.h | 721 const char * const Aliases[5]; member
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