/external/llvm/test/CodeGen/MIR/ARM/ |
D | cfi-same-value.mir | 35 CFI_INSTRUCTION .cfi_def_cfa_offset 8 36 CFI_INSTRUCTION .cfi_offset %r5, -4 37 CFI_INSTRUCTION .cfi_offset %r4, -8 51 CFI_INSTRUCTION .cfi_def_cfa_offset 12 52 CFI_INSTRUCTION .cfi_offset %lr, -12 56 CFI_INSTRUCTION .cfi_def_cfa_offset 0 63 CFI_INSTRUCTION .cfi_def_cfa_offset 0 64 ; CHECK: CFI_INSTRUCTION .cfi_same_value %r4 65 ; CHECK-NEXT: CFI_INSTRUCTION .cfi_same_value %r5 66 CFI_INSTRUCTION .cfi_same_value %r4 [all …]
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D | ARMLoadStoreDBG.mir | 148 frame-setup CFI_INSTRUCTION .cfi_def_cfa_offset 8 149 frame-setup CFI_INSTRUCTION .cfi_offset %lr, -4 150 frame-setup CFI_INSTRUCTION .cfi_offset %r7, -8
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D | sched-it-debug-nodes.mir | 147 frame-setup CFI_INSTRUCTION .cfi_def_cfa_offset 8 148 frame-setup CFI_INSTRUCTION .cfi_offset %lr, -4 149 frame-setup CFI_INSTRUCTION .cfi_offset %r7, -8
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/external/llvm/test/CodeGen/MIR/X86/ |
D | cfi-def-cfa-register.mir | 27 CFI_INSTRUCTION .cfi_def_cfa_offset 16 28 CFI_INSTRUCTION .cfi_offset %rbp, -16 30 ; CHECK: CFI_INSTRUCTION .cfi_def_cfa_register %rbp 31 CFI_INSTRUCTION .cfi_def_cfa_register %rbp
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D | liveout-register-mask.mir | 34 CFI_INSTRUCTION .cfi_def_cfa_offset 16 35 CFI_INSTRUCTION .cfi_offset %rbp, -16 37 CFI_INSTRUCTION .cfi_def_cfa_register %rbp
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D | cfi-offset.mir | 34 CFI_INSTRUCTION .cfi_def_cfa_offset 16 35 ; CHECK: CFI_INSTRUCTION .cfi_offset %rbx, -16 36 CFI_INSTRUCTION .cfi_offset %rbx, -16
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D | cfi-def-cfa-offset.mir | 24 ; CHECK: CFI_INSTRUCTION .cfi_def_cfa_offset 4048 25 CFI_INSTRUCTION .cfi_def_cfa_offset 4048
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D | expected-comma-after-cfi-register.mir | 30 CFI_INSTRUCTION .cfi_def_cfa_offset 16 32 CFI_INSTRUCTION .cfi_offset %rbx -16
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D | expected-register-after-cfi-operand.mir | 30 CFI_INSTRUCTION .cfi_def_cfa_offset 16 32 CFI_INSTRUCTION .cfi_offset %0, -16
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D | expected-offset-after-cfi-operand.mir | 23 CFI_INSTRUCTION .cfi_def_cfa_offset _
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D | large-cfi-offset-number-error.mir | 23 CFI_INSTRUCTION .cfi_def_cfa_offset 123456789123456
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D | fixed-stack-memory-operands.mir | 32 CFI_INSTRUCTION .cfi_def_cfa_offset 8
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D | early-clobber-register-flag.mir | 36 CFI_INSTRUCTION .cfi_def_cfa_offset 16
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/external/llvm/test/CodeGen/MIR/AArch64/ |
D | cfi-def-cfa.mir | 24 ; CHECK: CFI_INSTRUCTION .cfi_def_cfa %w29, 16 25 frame-setup CFI_INSTRUCTION .cfi_def_cfa %w29, 16 26 frame-setup CFI_INSTRUCTION .cfi_offset %w30, -8 27 frame-setup CFI_INSTRUCTION .cfi_offset %w29, -16
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/external/llvm/test/CodeGen/MIR/Mips/ |
D | memory-operands.mir | 47 CFI_INSTRUCTION .cfi_def_cfa_offset 24 48 CFI_INSTRUCTION .cfi_offset %ra_64, -4 83 CFI_INSTRUCTION .cfi_def_cfa_offset 32 84 CFI_INSTRUCTION .cfi_offset %ra_64, -4 85 CFI_INSTRUCTION .cfi_offset %s2_64, -8 86 CFI_INSTRUCTION .cfi_offset %s0_64, -12
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/external/llvm/test/CodeGen/X86/ |
D | patchpoint-verifiable.mir | 34 CFI_INSTRUCTION .cfi_def_cfa_offset 16 35 CFI_INSTRUCTION .cfi_offset %rbp, -16 37 CFI_INSTRUCTION .cfi_def_cfa_register %rbp
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/external/llvm/lib/Target/ARM/ |
D | Thumb1FrameLowering.cpp | 127 BuildMI(MBB, MBBI, dl, TII.get(TargetOpcode::CFI_INSTRUCTION)) in emitPrologue() 139 BuildMI(MBB, MBBI, dl, TII.get(TargetOpcode::CFI_INSTRUCTION)) in emitPrologue() 202 BuildMI(MBB, MBBI, dl, TII.get(TargetOpcode::CFI_INSTRUCTION)) in emitPrologue() 230 BuildMI(MBB, MBBI, dl, TII.get(TargetOpcode::CFI_INSTRUCTION)) in emitPrologue() 248 BuildMI(MBB, MBBI, dl, TII.get(TargetOpcode::CFI_INSTRUCTION)) in emitPrologue() 255 BuildMI(MBB, MBBI, dl, TII.get(TargetOpcode::CFI_INSTRUCTION)) in emitPrologue() 273 BuildMI(MBB, MBBI, dl, TII.get(TargetOpcode::CFI_INSTRUCTION)) in emitPrologue()
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D | ARMFrameLowering.cpp | 219 TII.get(TargetOpcode::CFI_INSTRUCTION)) in emitDefCFAOffsets() 534 BuildMI(MBB, AfterPush, dl, TII.get(TargetOpcode::CFI_INSTRUCTION)) in emitPrologue() 541 BuildMI(MBB, AfterPush, dl, TII.get(TargetOpcode::CFI_INSTRUCTION)) in emitPrologue() 576 BuildMI(MBB, Pos, dl, TII.get(TargetOpcode::CFI_INSTRUCTION)) in emitPrologue() 600 BuildMI(MBB, Pos, dl, TII.get(TargetOpcode::CFI_INSTRUCTION)) in emitPrologue() 622 BuildMI(MBB, Pos, dl, TII.get(TargetOpcode::CFI_INSTRUCTION)) in emitPrologue() 1943 BuildMI(PrevStackMBB, DL, TII.get(TargetOpcode::CFI_INSTRUCTION)) in adjustForSegmentedStacks() 1947 BuildMI(PrevStackMBB, DL, TII.get(TargetOpcode::CFI_INSTRUCTION)) in adjustForSegmentedStacks() 1951 BuildMI(PrevStackMBB, DL, TII.get(TargetOpcode::CFI_INSTRUCTION)) in adjustForSegmentedStacks() 2061 BuildMI(AllocMBB, DL, TII.get(TargetOpcode::CFI_INSTRUCTION)) in adjustForSegmentedStacks() [all …]
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/external/llvm/include/llvm/Target/ |
D | TargetOpcodes.h | 28 CFI_INSTRUCTION = 2, enumerator
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/external/llvm/lib/Target/Mips/ |
D | Mips16FrameLowering.cpp | 62 BuildMI(MBB, MBBI, dl, TII.get(TargetOpcode::CFI_INSTRUCTION)) in emitPrologue() 77 BuildMI(MBB, MBBI, dl, TII.get(TargetOpcode::CFI_INSTRUCTION)) in emitPrologue()
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D | MipsSEFrameLowering.cpp | 416 BuildMI(MBB, MBBI, dl, TII.get(TargetOpcode::CFI_INSTRUCTION)) in emitPrologue() 450 BuildMI(MBB, MBBI, dl, TII.get(TargetOpcode::CFI_INSTRUCTION)) in emitPrologue() 455 BuildMI(MBB, MBBI, dl, TII.get(TargetOpcode::CFI_INSTRUCTION)) in emitPrologue() 466 BuildMI(MBB, MBBI, dl, TII.get(TargetOpcode::CFI_INSTRUCTION)) in emitPrologue() 471 BuildMI(MBB, MBBI, dl, TII.get(TargetOpcode::CFI_INSTRUCTION)) in emitPrologue() 477 BuildMI(MBB, MBBI, dl, TII.get(TargetOpcode::CFI_INSTRUCTION)) in emitPrologue() 498 BuildMI(MBB, MBBI, dl, TII.get(TargetOpcode::CFI_INSTRUCTION)) in emitPrologue() 512 BuildMI(MBB, MBBI, dl, TII.get(TargetOpcode::CFI_INSTRUCTION)) in emitPrologue()
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/external/llvm/lib/Target/AArch64/ |
D | AArch64FrameLowering.cpp | 247 BuildMI(MBB, MBBI, DL, TII->get(TargetOpcode::CFI_INSTRUCTION)) in emitCalleeSavedFrameMoves() 319 BuildMI(MBB, MBBI, DL, TII->get(TargetOpcode::CFI_INSTRUCTION)) in emitPrologue() 479 BuildMI(MBB, MBBI, DL, TII->get(TargetOpcode::CFI_INSTRUCTION)) in emitPrologue() 487 BuildMI(MBB, MBBI, DL, TII->get(TargetOpcode::CFI_INSTRUCTION)) in emitPrologue() 494 BuildMI(MBB, MBBI, DL, TII->get(TargetOpcode::CFI_INSTRUCTION)) in emitPrologue() 501 BuildMI(MBB, MBBI, DL, TII->get(TargetOpcode::CFI_INSTRUCTION)) in emitPrologue()
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/external/llvm/lib/Target/Sparc/ |
D | SparcFrameLowering.cpp | 163 BuildMI(MBB, MBBI, dl, TII.get(TargetOpcode::CFI_INSTRUCTION)) in emitPrologue() 168 BuildMI(MBB, MBBI, dl, TII.get(TargetOpcode::CFI_INSTRUCTION)) in emitPrologue() 176 BuildMI(MBB, MBBI, dl, TII.get(TargetOpcode::CFI_INSTRUCTION)) in emitPrologue()
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/external/llvm/lib/Target/SystemZ/ |
D | SystemZFrameLowering.cpp | 348 BuildMI(MBB, MBBI, DL, ZII->get(TargetOpcode::CFI_INSTRUCTION)) in emitPrologue() 363 BuildMI(MBB, MBBI, DL, ZII->get(TargetOpcode::CFI_INSTRUCTION)) in emitPrologue() 377 BuildMI(MBB, MBBI, DL, ZII->get(TargetOpcode::CFI_INSTRUCTION)) in emitPrologue() 413 BuildMI(MBB, MBBI, DL, ZII->get(TargetOpcode::CFI_INSTRUCTION)) in emitPrologue()
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/external/llvm/lib/Target/PowerPC/ |
D | PPCFrameLowering.cpp | 880 BuildMI(MBB, MBBI, dl, TII.get(TargetOpcode::CFI_INSTRUCTION)) in emitPrologue() 888 BuildMI(MBB, MBBI, dl, TII.get(TargetOpcode::CFI_INSTRUCTION)) in emitPrologue() 897 BuildMI(MBB, MBBI, dl, TII.get(TargetOpcode::CFI_INSTRUCTION)) in emitPrologue() 906 BuildMI(MBB, MBBI, dl, TII.get(TargetOpcode::CFI_INSTRUCTION)) in emitPrologue() 915 BuildMI(MBB, MBBI, dl, TII.get(TargetOpcode::CFI_INSTRUCTION)) in emitPrologue() 933 BuildMI(MBB, MBBI, dl, TII.get(TargetOpcode::CFI_INSTRUCTION)) in emitPrologue() 966 BuildMI(MBB, MBBI, dl, TII.get(TargetOpcode::CFI_INSTRUCTION)) in emitPrologue() 974 BuildMI(MBB, MBBI, dl, TII.get(TargetOpcode::CFI_INSTRUCTION)) in emitPrologue()
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