/external/clang/lib/Headers/ |
D | htmintrin.h | 40 #define _HTM_STATE(CR0) ((CR0 >> 1) & 0x3) argument
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/external/llvm/lib/Target/PowerPC/ |
D | PPCInstrHTM.td | 89 // All HTM instructions, with the exception of tcheck, set CR0 with the 91 // instruction is executed. For tbegin., the EQ bit in CR0 can be used
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D | PPCInstrInfo.td | 760 let Defs = [CR0] in 775 let Defs = [CARRY, CR0] in 790 let Defs = [CARRY, CR0] in 804 let Defs = [CR0] in 818 let Defs = [CR0] in 834 let Defs = [CR0] in 850 let Defs = [CARRY, CR0] in 864 let Defs = [CR0] in 879 let Defs = [CARRY, CR0] in 893 let Defs = [CR0] in [all …]
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D | PPCRegisterInfo.h | 30 Reg = PPC::CR0; in getCRFromCRBit()
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D | PPCRegisterInfo.td | 194 def CR0 : CR<0, "cr0", [CR0LT, CR0GT, CR0EQ, CR0UN]>, DwarfRegNum<[68, 68]>; 344 def CRRC : RegisterClass<"PPC", [i32], 32, (add CR0, CR1, CR5, CR6, 347 def CRRC0 : RegisterClass<"PPC", [i32], 32, (add CR0)>;
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D | PPCInstr64Bit.td | 208 let Defs = [CR0] in { 249 let Defs = [CR0], mayStore = 1, hasSideEffects = 0 in 438 let Defs = [CR0] in { 636 let Defs = [CR0] in 645 let Defs = [CR0] in 936 Defs = [X0,X4,X5,X6,X7,X8,X9,X10,X11,X12,LR8,CTR8,CR0,CR1,CR5,CR6,CR7] in 945 Defs = [X0,X3,X4,X5,X6,X7,X8,X9,X10,X11,X12,LR8,CTR8,CR0,CR1,CR5,CR6,CR7] 968 Defs = [X0,X4,X5,X6,X7,X8,X9,X10,X11,X12,LR8,CTR8,CR0,CR1,CR5,CR6,CR7] in 977 Defs = [X0,X3,X4,X5,X6,X7,X8,X9,X10,X11,X12,LR8,CTR8,CR0,CR1,CR5,CR6,CR7]
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D | PPCRegisterInfo.cpp | 487 if (SrcReg != PPC::CR0) { in lowerCRSpilling() 532 if (DestReg != PPC::CR0) { in lowerCRRestore()
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D | PPCInstrInfo.cpp | 1631 Instr.modifiesRegister(PPC::CR0, TRI) || in optimizeCompareInstr() 1632 Instr.readsRegister(PPC::CR0, TRI))) in optimizeCompareInstr() 1737 .addReg(PPC::CR0, MIOpC != NewOpC ? RegState::Kill : 0); in optimizeCompareInstr()
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D | PPCISelLowering.cpp | 8195 .addImm(PPC::PRED_NE).addReg(PPC::CR0).addMBB(loopMBB); in EmitAtomicBinary() 8325 .addImm(PPC::PRED_NE).addReg(PPC::CR0).addMBB(loopMBB); in EmitPartwordAtomicBinary() 8907 BuildMI(BB, dl, TII->get(is64bit ? PPC::CMPD : PPC::CMPW), PPC::CR0) in EmitInstrWithCustomInserter() 8910 .addImm(PPC::PRED_NE).addReg(PPC::CR0).addMBB(midMBB); in EmitInstrWithCustomInserter() 8918 .addImm(PPC::PRED_NE).addReg(PPC::CR0).addMBB(loop1MBB); in EmitInstrWithCustomInserter() 9049 BuildMI(BB, dl, TII->get(PPC::CMPW), PPC::CR0) in EmitInstrWithCustomInserter() 9052 .addImm(PPC::PRED_NE).addReg(PPC::CR0).addMBB(midMBB); in EmitInstrWithCustomInserter() 9064 .addImm(PPC::PRED_NE).addReg(PPC::CR0).addMBB(loop1MBB); in EmitInstrWithCustomInserter() 10981 R.first = PPC::CR0; in getRegForInlineAsmConstraint()
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D | PPCISelDAGToDAG.cpp | 2729 SDValue CR0Reg = CurDAG->getRegister(PPC::CR0, MVT::i32); in Select()
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/external/kernel-headers/original/uapi/asm-generic/ |
D | termbits.h | 91 #define CR0 0000000 macro
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/external/kernel-headers/original/uapi/asm-mips/asm/ |
D | termbits.h | 111 #define CR0 0000000 macro
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/external/llvm/lib/Target/PowerPC/MCTargetDesc/ |
D | PPCMCCodeEmitter.cpp | 336 (MO.getReg() >= PPC::CR0 && MO.getReg() <= PPC::CR7)); in get_crbitm_encoding() 350 MO.getReg() < PPC::CR0 || MO.getReg() > PPC::CR7); in getMachineOpValue()
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/external/llvm/lib/IR/ |
D | ConstantRange.cpp | 140 [](const ConstantRange &CR0, const ConstantRange &CR1) { in makeNoWrapRegion() argument 141 return CR0.inverse().unionWith(CR1.inverse()).inverse(); in makeNoWrapRegion()
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/external/llvm/lib/Target/PowerPC/InstPrinter/ |
D | PPCInstPrinter.cpp | 358 case PPC::CR0: RegNo = 0; break; in printcrbitm()
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/external/llvm/lib/Target/X86/Disassembler/ |
D | X86DisassemblerDecoder.h | 355 ENTRY(CR0) \
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/external/llvm/lib/Target/PowerPC/Disassembler/ |
D | PPCDisassembler.cpp | 66 PPC::CR0, PPC::CR1, PPC::CR2, PPC::CR3,
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/external/llvm/lib/Target/X86/ |
D | X86RegisterInfo.td | 284 def CR0 : X86Reg<"cr0", 0>;
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/external/mesa3d/src/mesa/x86/ |
D | assyntax.h | 124 #define CR0 cr0 macro 186 #define CR0 %cr0 macro
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/external/llvm/lib/Target/PowerPC/AsmParser/ |
D | PPCAsmParser.cpp | 176 PPC::CR0, PPC::CR1, PPC::CR2, PPC::CR3,
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/external/llvm/docs/ |
D | LangRef.rst | 3423 - ``y``: Condition register (``CR0-CR7``).
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