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Searched refs:CTPOP (Results 1 – 25 of 27) sorted by relevance

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/external/llvm/include/llvm/CodeGen/
DISDOpcodes.h339 BSWAP, CTTZ, CTLZ, CTPOP, BITREVERSE, enumerator
/external/llvm/lib/Target/Hexagon/
DHexagonISelLowering.cpp1678 setOperationAction(ISD::CTPOP, MVT::i8, Promote); in HexagonTargetLowering()
1679 setOperationAction(ISD::CTPOP, MVT::i16, Promote); in HexagonTargetLowering()
1680 setOperationAction(ISD::CTPOP, MVT::i32, Promote); in HexagonTargetLowering()
1681 setOperationAction(ISD::CTPOP, MVT::i64, Custom); in HexagonTargetLowering()
1754 ISD::CTPOP, ISD::CTLZ, ISD::CTTZ, ISD::CTLZ_ZERO_UNDEF, in HexagonTargetLowering()
1857 setOperationAction(ISD::CTPOP, MVT::i8, Expand); in HexagonTargetLowering()
1858 setOperationAction(ISD::CTPOP, MVT::i16, Expand); in HexagonTargetLowering()
1859 setOperationAction(ISD::CTPOP, MVT::i32, Expand); in HexagonTargetLowering()
1860 setOperationAction(ISD::CTPOP, MVT::i64, Expand); in HexagonTargetLowering()
2609 case ISD::CTPOP: return LowerCTPOP(Op, DAG); in LowerOperation()
/external/llvm/lib/CodeGen/SelectionDAG/
DTargetLowering.cpp1314 SDValue CTPOP = N0; in SimplifySetCC() local
1317 CTPOP = N0.getOperand(0); in SimplifySetCC()
1319 if (CTPOP.hasOneUse() && CTPOP.getOpcode() == ISD::CTPOP && in SimplifySetCC()
1320 (N0 == CTPOP || N0.getValueType().getSizeInBits() > in SimplifySetCC()
1321 Log2_32_Ceil(CTPOP.getValueType().getSizeInBits()))) { in SimplifySetCC()
1322 EVT CTVT = CTPOP.getValueType(); in SimplifySetCC()
1323 SDValue CTOp = CTPOP.getOperand(0); in SimplifySetCC()
DSelectionDAGDumper.cpp317 case ISD::CTPOP: return "ctpop"; in getOperationName()
DLegalizeIntegerTypes.cpp64 case ISD::CTPOP: Res = PromoteIntRes_CTPOP(N); break; in PromoteIntegerResult()
385 return DAG.getNode(ISD::CTPOP, SDLoc(N), Op.getValueType(), Op); in PromoteIntRes_CTPOP()
1314 case ISD::CTPOP: ExpandIntRes_CTPOP(N, Lo, Hi); break; in ExpandIntegerResult()
1936 Lo = DAG.getNode(ISD::ADD, dl, NVT, DAG.getNode(ISD::CTPOP, dl, NVT, Lo), in ExpandIntRes_CTPOP()
1937 DAG.getNode(ISD::CTPOP, dl, NVT, Hi)); in ExpandIntRes_CTPOP()
DLegalizeDAG.cpp2894 case ISD::CTPOP: { in ExpandBitCount()
2962 return DAG.getNode(ISD::CTPOP, dl, VT, Op); in ExpandBitCount()
2978 if (!TLI.isOperationLegalOrCustom(ISD::CTPOP, VT) && in ExpandBitCount()
2983 return DAG.getNode(ISD::CTPOP, dl, VT, Tmp3); in ExpandBitCount()
2994 case ISD::CTPOP: in ExpandNode()
4233 case ISD::CTPOP: in PromoteNode()
DLegalizeVectorTypes.cpp74 case ISD::CTPOP: in ScalarizeVectorResult()
631 case ISD::CTPOP: in SplitVectorResult()
1443 case ISD::CTPOP: in SplitVectorOperand()
2088 case ISD::CTPOP: in WidenVectorResult()
DLegalizeVectorOps.cpp289 case ISD::CTPOP: in LegalizeOp()
DSelectionDAG.cpp2273 case ISD::CTPOP: { in computeKnownBits()
2904 case ISD::CTPOP: in getNode()
3003 case ISD::CTPOP: { in getNode()
/external/llvm/lib/Target/MSP430/
DMSP430ISelLowering.cpp126 setOperationAction(ISD::CTPOP, MVT::i8, Expand); in MSP430TargetLowering()
127 setOperationAction(ISD::CTPOP, MVT::i16, Expand); in MSP430TargetLowering()
/external/llvm/lib/Target/BPF/
DBPFISelLowering.cpp142 setOperationAction(ISD::CTPOP, MVT::i64, Expand); in BPFTargetLowering()
/external/mesa3d/src/gallium/drivers/radeon/
DAMDILISelLowering.cpp156 setOperationAction(ISD::CTPOP, VT, Expand); in InitAMDILLowering()
/external/llvm/lib/Target/Mips/
DMipsISelLowering.cpp336 setOperationAction(ISD::CTPOP, MVT::i32, Legal); in MipsTargetLowering()
337 setOperationAction(ISD::CTPOP, MVT::i64, Legal); in MipsTargetLowering()
339 setOperationAction(ISD::CTPOP, MVT::i32, Expand); in MipsTargetLowering()
340 setOperationAction(ISD::CTPOP, MVT::i64, Expand); in MipsTargetLowering()
DMipsSEISelLowering.cpp263 setOperationAction(ISD::CTPOP, Ty, Legal); in addMSAIntType()
2085 return DAG.getNode(ISD::CTPOP, DL, Op->getValueType(0), Op->getOperand(1)); in lowerINTRINSIC_WO_CHAIN()
/external/llvm/lib/Target/AMDGPU/
DAMDGPUISelLowering.cpp259 setOperationAction(ISD::CTPOP, MVT::i32, Expand); in AMDGPUTargetLowering()
262 setOperationAction(ISD::CTPOP, MVT::i64, Expand); in AMDGPUTargetLowering()
328 setOperationAction(ISD::CTPOP, VT, Expand); in AMDGPUTargetLowering()
/external/llvm/lib/Target/NVPTX/
DNVPTXISelLowering.cpp269 setOperationAction(ISD::CTPOP, MVT::i16, Legal); in NVPTXTargetLowering()
270 setOperationAction(ISD::CTPOP, MVT::i32, Legal); in NVPTXTargetLowering()
271 setOperationAction(ISD::CTPOP, MVT::i64, Legal); in NVPTXTargetLowering()
/external/llvm/lib/Target/ARM/
DARMISelLowering.cpp580 setOperationAction(ISD::CTPOP, MVT::v2i32, Custom); in ARMTargetLowering()
581 setOperationAction(ISD::CTPOP, MVT::v4i32, Custom); in ARMTargetLowering()
582 setOperationAction(ISD::CTPOP, MVT::v4i16, Custom); in ARMTargetLowering()
583 setOperationAction(ISD::CTPOP, MVT::v8i16, Custom); in ARMTargetLowering()
757 setOperationAction(ISD::CTPOP, MVT::i32, Expand); in ARMTargetLowering()
4359 return DAG.getNode(ISD::CTPOP, dl, VT, Bits); in LowerCTTZ()
4395 SDValue Cnt8 = DAG.getNode(ISD::CTPOP, dl, VT8Bit, BitsVT8); in LowerCTTZ()
4445 SDValue N1 = DAG.getNode(ISD::CTPOP, DL, VT8Bit, N0); in getCTPOP16BitCounts()
6867 case ISD::CTPOP: return LowerCTPOP(Op.getNode(), DAG, Subtarget); in LowerOperation()
/external/llvm/docs/
DWritingAnLLVMBackend.rst1425 is rarely used. In ``SparcISelLowering.cpp``, the action for ``CTPOP`` (an
1432 setOperationAction(ISD::CTPOP, MVT::i32, Expand);
1435 setOperationAction(ISD::CTPOP, MVT::i32, Legal);
/external/llvm/lib/Target/SystemZ/
DSystemZISelLowering.cpp181 setOperationAction(ISD::CTPOP, VT, Custom); in SystemZTargetLowering()
183 setOperationAction(ISD::CTPOP, VT, Expand); in SystemZTargetLowering()
310 setOperationAction(ISD::CTPOP, VT, Custom); in SystemZTargetLowering()
4349 case ISD::CTPOP: in LowerOperation()
/external/llvm/lib/Target/X86/
DX86ISelLowering.cpp397 setOperationAction(ISD::CTPOP , MVT::i8 , Promote); in X86TargetLowering()
399 setOperationAction(ISD::CTPOP , MVT::i8 , Expand); in X86TargetLowering()
400 setOperationAction(ISD::CTPOP , MVT::i16 , Expand); in X86TargetLowering()
401 setOperationAction(ISD::CTPOP , MVT::i32 , Expand); in X86TargetLowering()
403 setOperationAction(ISD::CTPOP , MVT::i64 , Expand); in X86TargetLowering()
725 setOperationAction(ISD::CTPOP, VT, Expand); in X86TargetLowering()
862 setOperationAction(ISD::CTPOP, MVT::v16i8, Custom); in X86TargetLowering()
863 setOperationAction(ISD::CTPOP, MVT::v8i16, Custom); in X86TargetLowering()
864 setOperationAction(ISD::CTPOP, MVT::v4i32, Custom); in X86TargetLowering()
865 setOperationAction(ISD::CTPOP, MVT::v2i64, Custom); in X86TargetLowering()
[all …]
/external/llvm/lib/Target/PowerPC/
DPPCISelLowering.cpp218 setOperationAction(ISD::CTPOP, MVT::i32 , Legal); in PPCTargetLowering()
219 setOperationAction(ISD::CTPOP, MVT::i64 , Legal); in PPCTargetLowering()
221 setOperationAction(ISD::CTPOP, MVT::i32 , Expand); in PPCTargetLowering()
222 setOperationAction(ISD::CTPOP, MVT::i64 , Expand); in PPCTargetLowering()
418 setOperationAction(ISD::CTPOP, VT, Legal); in PPCTargetLowering()
422 setOperationAction(ISD::CTPOP, VT, Expand); in PPCTargetLowering()
/external/llvm/lib/Target/AArch64/
DAArch64ISelLowering.cpp235 setOperationAction(ISD::CTPOP, MVT::i32, Custom); in AArch64TargetLowering()
236 setOperationAction(ISD::CTPOP, MVT::i64, Custom); in AArch64TargetLowering()
683 setOperationAction(ISD::CTPOP, VT.getSimpleVT(), Expand); in addTypeForNEON()
2314 case ISD::CTPOP: in LowerOperation()
3807 SDValue CtPop = DAG.getNode(ISD::CTPOP, DL, MVT::v8i8, Val); in LowerCTPOP()
/external/llvm/lib/Target/Sparc/
DSparcISelLowering.cpp1574 setOperationAction(ISD::CTPOP, MVT::i64, in SparcTargetLowering()
1683 setOperationAction(ISD::CTPOP, MVT::i32, in SparcTargetLowering()
/external/llvm/include/llvm/Target/
DTargetSelectionDAG.td404 def ctpop : SDNode<"ISD::CTPOP" , SDTIntUnaryOp>;
/external/llvm/lib/Target/XCore/
DXCoreISelLowering.cpp110 setOperationAction(ISD::CTPOP, MVT::i32, Expand); in XCoreTargetLowering()

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