Searched refs:CoveredBySubRegs (Results 1 – 9 of 9) sorted by relevance
/external/llvm/lib/Target/Hexagon/ |
D | HexagonRegisterInfo.td | 96 let SubRegIndices = [subreg_loreg, subreg_hireg], CoveredBySubRegs = 1 in { 158 let SubRegIndices = [subreg_loreg, subreg_hireg], CoveredBySubRegs = 1 in { 173 let SubRegIndices = [subreg_loreg, subreg_hireg], CoveredBySubRegs = 1 in {
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/external/llvm/lib/Target/Sparc/ |
D | SparcRegisterInfo.td | 39 let CoveredBySubRegs = 1; 48 let CoveredBySubRegs = 1; 55 let CoveredBySubRegs = 1;
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/external/llvm/utils/TableGen/ |
D | CodeGenRegisters.cpp | 110 CoveredBySubRegs(R->getValueAsBit("CoveredBySubRegs")), in CodeGenRegister() 135 if (CoveredBySubRegs && !ExplicitSubRegs.empty()) in buildObjectGraph() 318 if (!CoveredBySubRegs) in computeSubRegs() 341 if (!SR->CoveredBySubRegs || SR->ExplicitSubRegs.size() <= 1) in computeSubRegs() 978 if (Reg.CoveredBySubRegs) in CodeGenRegBank() 2104 if (!Super->CoveredBySubRegs || Set.count(Super)) in computeCoveredRegisters()
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D | CodeGenRegisters.h | 131 bool CoveredBySubRegs; member
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/external/llvm/lib/Target/Mips/ |
D | MipsRegisterInfo.td | 57 let CoveredBySubRegs = 1; 63 let CoveredBySubRegs = 1; 76 let CoveredBySubRegs = 1;
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/external/llvm/lib/Target/AVR/ |
D | AVRRegisterInfo.td | 81 CoveredBySubRegs = 1 in
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/external/llvm/lib/Target/ARM/ |
D | ARMRegisterInfo.td | 20 let CoveredBySubRegs = 1;
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/external/llvm/lib/Target/X86/ |
D | X86RegisterInfo.td | 77 let SubRegIndices = [sub_8bit, sub_8bit_hi], CoveredBySubRegs = 1 in {
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/external/llvm/include/llvm/Target/ |
D | Target.td | 120 // CoveredBySubRegs - When this bit is set, the value of this register is 124 bit CoveredBySubRegs = 0;
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