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Searched refs:FIRST_TARGET_MEMORY_OPCODE (Results 1 – 12 of 12) sorted by relevance

/external/llvm/lib/Target/WebAssembly/
DWebAssemblyISD.def25 // add memory opcodes starting at ISD::FIRST_TARGET_MEMORY_OPCODE here...
/external/llvm/include/llvm/CodeGen/
DISDOpcodes.h768 static const int FIRST_TARGET_MEMORY_OPCODE = BUILTIN_OP_END+300; variable
DSelectionDAGNodes.h451 return NodeType >= ISD::FIRST_TARGET_MEMORY_OPCODE;
/external/llvm/lib/Target/AMDGPU/
DAMDGPUISelLowering.h301 FIRST_MEM_OPCODE_NUMBER = ISD::FIRST_TARGET_MEMORY_OPCODE,
/external/llvm/lib/Target/NVPTX/
DNVPTXISelLowering.h59 LoadV2 = ISD::FIRST_TARGET_MEMORY_OPCODE,
/external/llvm/lib/Target/SystemZ/
DSystemZISelLowering.h288 ATOMIC_SWAPW = ISD::FIRST_TARGET_MEMORY_OPCODE,
/external/llvm/lib/Target/AArch64/
DAArch64ISelLowering.h191 LD2post = ISD::FIRST_TARGET_MEMORY_OPCODE,
/external/llvm/lib/Target/ARM/
DARMISelLowering.h191 VLD2DUP = ISD::FIRST_TARGET_MEMORY_OPCODE,
/external/llvm/lib/Target/Mips/
DMipsISelLowering.h202 LWL = ISD::FIRST_TARGET_MEMORY_OPCODE,
/external/llvm/lib/Target/PowerPC/
DPPCISelLowering.h320 STBRX = ISD::FIRST_TARGET_MEMORY_OPCODE,
/external/llvm/lib/Target/X86/
DX86ISelLowering.h504 LCMPXCHG_DAG = ISD::FIRST_TARGET_MEMORY_OPCODE,
/external/llvm/lib/CodeGen/SelectionDAG/
DSelectionDAG.cpp4972 (int)Opcode >= ISD::FIRST_TARGET_MEMORY_OPCODE)) && in getMemIntrinsicNode()