| /external/mesa3d/src/mesa/main/ |
| D | querymatrix.c | 46 enum {FP_NAN, FP_INFINITE, FP_ZERO, FP_SUBNORMAL, FP_NORMAL} enumerator
64 return FP_ZERO; in fpclassify()
82 enum {FP_NAN, FP_INFINITE, FP_ZERO, FP_SUBNORMAL, FP_NORMAL} enumerator
162 case FP_ZERO: in _es_QueryMatrixxOES()
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| /external/mesa3d/src/gallium/drivers/radeon/ |
| D | AMDGPUInstructions.td | 84 def FP_ZERO : PatLeaf <
100 [(set rc:$dst, (int_AMDIL_clamp rc:$src0, (f32 FP_ZERO), (f32 FP_ONE)))]
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| D | R600Instructions.td | 274 (selectcc (f32 R600_Reg32:$src0), R600_Reg32:$src1, FP_ONE, FP_ZERO,
281 (selectcc (f32 R600_Reg32:$src0), R600_Reg32:$src1, FP_ONE, FP_ZERO,
288 (selectcc (f32 R600_Reg32:$src0), R600_Reg32:$src1, FP_ONE, FP_ZERO,
295 (selectcc (f32 R600_Reg32:$src0), R600_Reg32:$src1, FP_ONE, FP_ZERO,
1181 (selectcc (f32 R600_Reg32:$src0), R600_Reg32:$src1, FP_ONE, FP_ZERO, COND_LT),
1187 (selectcc (f32 R600_Reg32:$src0), R600_Reg32:$src1, FP_ONE, FP_ZERO, COND_LE),
1225 (selectcc (f32 R600_Reg32:$src0), R600_Reg32:$src1, FP_ONE, FP_ZERO, SETO),
1231 (selectcc (f32 R600_Reg32:$src0), R600_Reg32:$src1, FP_ONE, FP_ZERO, SETUO),
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| /external/vixl/src/vixl/ |
| D | utils.cc | 117 return FP_ZERO; in float16classify()
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| /external/valgrind/none/tests/ppc64/ |
| D | test_isa_2_07_part2.c | 838 if (fpclassify(src_dp) == FP_ZERO) in check_reciprocal_estimate()
841 return !res_is_negative && (fpclassify(res_dp) == FP_ZERO); in check_reciprocal_estimate()
847 return res_is_negative && (fpclassify(res_dp) == FP_ZERO); in check_reciprocal_estimate()
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| D | test_isa_2_06_part3.c | 483 if (fpclassify(SRC) == FP_ZERO) in check_estimate()
486 return !res_is_negative && (fpclassify(RES) == FP_ZERO); in check_estimate()
492 return res_is_negative && (fpclassify(RES) == FP_ZERO); in check_estimate()
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| /external/valgrind/none/tests/ppc32/ |
| D | test_isa_2_07_part2.c | 838 if (fpclassify(src_dp) == FP_ZERO) in check_reciprocal_estimate()
841 return !res_is_negative && (fpclassify(res_dp) == FP_ZERO); in check_reciprocal_estimate()
847 return res_is_negative && (fpclassify(res_dp) == FP_ZERO); in check_reciprocal_estimate()
|
| D | test_isa_2_06_part3.c | 483 if (fpclassify(SRC) == FP_ZERO) in check_estimate()
486 return !res_is_negative && (fpclassify(RES) == FP_ZERO); in check_estimate()
492 return res_is_negative && (fpclassify(RES) == FP_ZERO); in check_estimate()
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| /external/mesa3d/src/mesa/x86/ |
| D | x86_xform2.S | 39 #define FP_ZERO 0 macro
204 MOV_L( CONST(FP_ZERO), DST3 )
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| D | x86_xform3.S | 39 #define FP_ZERO 0 macro
|
| D | x86_xform4.S | 39 #define FP_ZERO 0 macro
|
| /external/llvm/lib/Target/AMDGPU/ |
| D | R600Instructions.td | 697 [(set f32:$dst, (selectcc f32:$src0, f32:$src1, FP_ONE, FP_ZERO, COND_OEQ))]
702 [(set f32:$dst, (selectcc f32:$src0, f32:$src1, FP_ONE, FP_ZERO, COND_OGT))]
707 [(set f32:$dst, (selectcc f32:$src0, f32:$src1, FP_ONE, FP_ZERO, COND_OGE))]
712 [(set f32:$dst, (selectcc f32:$src0, f32:$src1, FP_ONE, FP_ZERO, COND_UNE_NE))]
938 [(set f32:$dst, (selectcc f32:$src0, FP_ZERO, f32:$src1, f32:$src2, COND_OEQ))]
943 [(set f32:$dst, (selectcc f32:$src0, FP_ZERO, f32:$src1, f32:$src2, COND_OGT))]
950 [(set f32:$dst, (selectcc f32:$src0, FP_ZERO, f32:$src1, f32:$src2, COND_OGE))]
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| D | AMDGPUInstructions.td | 433 def FP_ZERO : PatLeaf <
456 [(set f32:$dst, (AMDGPUclamp f32:$src0, (f32 FP_ZERO), (f32 FP_ONE)))]
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| D | SIInstructions.td | 2608 (f32 FP_ZERO), (f32 FP_ONE)),
|
| /external/libxml2/ |
| D | trionan.c | 577 case FP_ZERO:
|
| /external/v8/src/ |
| D | conversions.cc | 126 case FP_ZERO: return "0"; in DoubleToCString()
|
| /external/libcxx/include/ |
| D | module.modulemap | 134 FP_INFINITE, FP_NAN, FP_NORMAL, FP_SUBNORMAL, FP_ZERO,
|
| D | cmath | 28 FP_ZERO // C99
|
| /external/vixl/src/vixl/a64/ |
| D | logic-a64.cc | 153 case FP_ZERO: in FPToDouble()
178 case FP_ZERO: in FPToFloat()
260 case FP_ZERO: in FPToFloat16()
310 case FP_ZERO: in FPToFloat16()
359 case FP_ZERO: in FPToFloat()
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| /external/v8/src/arm64/ |
| D | simulator-arm64.cc | 2810 case FP_ZERO: in FPToDouble()
2850 case FP_ZERO: in FPToFloat()
|